From e3b557809604d036af6e00c60f012c2025b59a5e Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sat, 11 Feb 2023 13:38:04 +0100 Subject: Vendor import of llvm-project main llvmorg-16-init-18548-gb0daacf58f41, the last commit before the upstream release/17.x branch was created. --- llvm/lib/CodeGen/MachineCycleAnalysis.cpp | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'llvm/lib/CodeGen/MachineCycleAnalysis.cpp') diff --git a/llvm/lib/CodeGen/MachineCycleAnalysis.cpp b/llvm/lib/CodeGen/MachineCycleAnalysis.cpp index 6871ac35b300..57f7a098ac17 100644 --- a/llvm/lib/CodeGen/MachineCycleAnalysis.cpp +++ b/llvm/lib/CodeGen/MachineCycleAnalysis.cpp @@ -9,8 +9,10 @@ #include "llvm/CodeGen/MachineCycleAnalysis.h" #include "llvm/ADT/GenericCycleImpl.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/MachineSSAContext.h" #include "llvm/CodeGen/TargetInstrInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" +#include "llvm/InitializePasses.h" using namespace llvm; @@ -52,6 +54,7 @@ void MachineCycleInfoWrapperPass::releaseMemory() { F = nullptr; } +namespace { class MachineCycleInfoPrinterPass : public MachineFunctionPass { public: static char ID; @@ -61,6 +64,7 @@ public: bool runOnMachineFunction(MachineFunction &F) override; void getAnalysisUsage(AnalysisUsage &AU) const override; }; +} // namespace char MachineCycleInfoPrinterPass::ID = 0; @@ -105,7 +109,7 @@ bool llvm::isCycleInvariant(const MachineCycle *Cycle, MachineInstr &I) { // An instruction that uses or defines a physical register can't e.g. be // hoisted, so mark this as not invariant. - if (Register::isPhysicalRegister(Reg)) { + if (Reg.isPhysical()) { if (MO.isUse()) { // If the physreg has no defs anywhere, it's just an ambient register // and we can freely move its uses. Alternatively, if it's allocatable, -- cgit v1.2.3