From cfca06d7963fa0909f90483b42a6d7d194d01e08 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sun, 26 Jul 2020 19:36:28 +0000 Subject: Vendor import of llvm-project master 2e10b7a39b9, the last commit before the llvmorg-12-init tag, from which release/11.x was branched. --- llvm/lib/CodeGen/MachineInstrBundle.cpp | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) (limited to 'llvm/lib/CodeGen/MachineInstrBundle.cpp') diff --git a/llvm/lib/CodeGen/MachineInstrBundle.cpp b/llvm/lib/CodeGen/MachineInstrBundle.cpp index 94865b0e9031..50456e489ea1 100644 --- a/llvm/lib/CodeGen/MachineInstrBundle.cpp +++ b/llvm/lib/CodeGen/MachineInstrBundle.cpp @@ -136,14 +136,14 @@ void llvm::finalizeBundle(MachineBasicBlock &MBB, BuildMI(MF, getDebugLoc(FirstMI, LastMI), TII->get(TargetOpcode::BUNDLE)); Bundle.prepend(MIB); - SmallVector LocalDefs; - SmallSet LocalDefSet; - SmallSet DeadDefSet; - SmallSet KilledDefSet; - SmallVector ExternUses; - SmallSet ExternUseSet; - SmallSet KilledUseSet; - SmallSet UndefUseSet; + SmallVector LocalDefs; + SmallSet LocalDefSet; + SmallSet DeadDefSet; + SmallSet KilledDefSet; + SmallVector ExternUses; + SmallSet ExternUseSet; + SmallSet KilledUseSet; + SmallSet UndefUseSet; SmallVector Defs; for (auto MII = FirstMI; MII != LastMI; ++MII) { for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) { @@ -207,9 +207,9 @@ void llvm::finalizeBundle(MachineBasicBlock &MBB, Defs.clear(); } - SmallSet Added; + SmallSet Added; for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) { - unsigned Reg = LocalDefs[i]; + Register Reg = LocalDefs[i]; if (Added.insert(Reg).second) { // If it's not live beyond end of the bundle, mark it dead. bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg); @@ -219,7 +219,7 @@ void llvm::finalizeBundle(MachineBasicBlock &MBB, } for (unsigned i = 0, e = ExternUses.size(); i != e; ++i) { - unsigned Reg = ExternUses[i]; + Register Reg = ExternUses[i]; bool isKill = KilledUseSet.count(Reg); bool isUndef = UndefUseSet.count(Reg); MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) | @@ -279,7 +279,7 @@ bool llvm::finalizeBundles(MachineFunction &MF) { } VirtRegInfo llvm::AnalyzeVirtRegInBundle( - MachineInstr &MI, unsigned Reg, + MachineInstr &MI, Register Reg, SmallVectorImpl> *Ops) { VirtRegInfo RI = {false, false, false}; for (MIBundleOperands O(MI); O.isValid(); ++O) { @@ -308,13 +308,12 @@ VirtRegInfo llvm::AnalyzeVirtRegInBundle( return RI; } -PhysRegInfo llvm::AnalyzePhysRegInBundle(const MachineInstr &MI, unsigned Reg, +PhysRegInfo llvm::AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, const TargetRegisterInfo *TRI) { bool AllDefsDead = true; PhysRegInfo PRI = {false, false, false, false, false, false, false, false}; - assert(Register::isPhysicalRegister(Reg) && - "analyzePhysReg not given a physical register!"); + assert(Reg.isPhysical() && "analyzePhysReg not given a physical register!"); for (ConstMIBundleOperands O(MI); O.isValid(); ++O) { const MachineOperand &MO = *O; -- cgit v1.2.3