From 344a3780b2e33f6ca763666c380202b18aab72a3 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Thu, 29 Jul 2021 22:15:26 +0200 Subject: Vendor import of llvm-project main 88e66fa60ae5, the last commit before the upstream release/13.x branch was created. --- llvm/lib/CodeGen/RegAllocBasic.cpp | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) (limited to 'llvm/lib/CodeGen/RegAllocBasic.cpp') diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp index 8f2cb48c5d69..b65d58077958 100644 --- a/llvm/lib/CodeGen/RegAllocBasic.cpp +++ b/llvm/lib/CodeGen/RegAllocBasic.cpp @@ -76,7 +76,7 @@ class RABasic : public MachineFunctionPass, void LRE_WillShrinkVirtReg(Register) override; public: - RABasic(); + RABasic(const RegClassFilterFunc F = allocateAllRegClasses); /// Return the pass name. StringRef getPassName() const override { return "Basic Register Allocator"; } @@ -88,7 +88,7 @@ public: Spiller &spiller() override { return *SpillerInstance; } - void enqueue(LiveInterval *LI) override { + void enqueueImpl(LiveInterval *LI) override { Queue.push(LI); } @@ -171,7 +171,9 @@ void RABasic::LRE_WillShrinkVirtReg(Register VirtReg) { enqueue(&LI); } -RABasic::RABasic(): MachineFunctionPass(ID) { +RABasic::RABasic(RegClassFilterFunc F): + MachineFunctionPass(ID), + RegAllocBase(F) { } void RABasic::getAnalysisUsage(AnalysisUsage &AU) const { @@ -286,16 +288,14 @@ MCRegister RABasic::selectOrSplit(LiveInterval &VirtReg, } // Try to spill another interfering reg with less spill weight. - for (auto PhysRegI = PhysRegSpillCands.begin(), - PhysRegE = PhysRegSpillCands.end(); - PhysRegI != PhysRegE; ++PhysRegI) { - if (!spillInterferences(VirtReg, *PhysRegI, SplitVRegs)) + for (MCRegister &PhysReg : PhysRegSpillCands) { + if (!spillInterferences(VirtReg, PhysReg, SplitVRegs)) continue; - assert(!Matrix->checkInterference(VirtReg, *PhysRegI) && + assert(!Matrix->checkInterference(VirtReg, PhysReg) && "Interference after spill."); // Tell the caller to allocate to this newly freed physical register. - return *PhysRegI; + return PhysReg; } // No other spill candidates were found, so spill the current VirtReg. @@ -322,7 +322,7 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) { getAnalysis()); VRAI.calculateSpillWeightsAndHints(); - SpillerInstance.reset(createInlineSpiller(*this, *MF, *VRM)); + SpillerInstance.reset(createInlineSpiller(*this, *MF, *VRM, VRAI)); allocatePhysRegs(); postOptimization(); @@ -334,7 +334,10 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) { return true; } -FunctionPass* llvm::createBasicRegisterAllocator() -{ +FunctionPass* llvm::createBasicRegisterAllocator() { return new RABasic(); } + +FunctionPass* llvm::createBasicRegisterAllocator(RegClassFilterFunc F) { + return new RABasic(F); +} -- cgit v1.3