From cfca06d7963fa0909f90483b42a6d7d194d01e08 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sun, 26 Jul 2020 19:36:28 +0000 Subject: Vendor import of llvm-project master 2e10b7a39b9, the last commit before the llvmorg-12-init tag, from which release/11.x was branched. --- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp') diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp index 3ef5a77af45e..8482dbfec250 100644 --- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp +++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp @@ -228,11 +228,6 @@ void GCNHazardRecognizer::processBundle() { CurrCycleInstr = nullptr; } -unsigned GCNHazardRecognizer::PreEmitNoops(SUnit *SU) { - IsHazardRecognizerMode = false; - return PreEmitNoopsCommon(SU->getInstr()); -} - unsigned GCNHazardRecognizer::PreEmitNoops(MachineInstr *MI) { IsHazardRecognizerMode = true; CurrCycleInstr = MI; @@ -486,6 +481,14 @@ void GCNHazardRecognizer::addClauseInst(const MachineInstr &MI) { addRegsToSet(TRI, MI.uses(), ClauseUses); } +static bool breaksSMEMSoftClause(MachineInstr *MI) { + return !SIInstrInfo::isSMRD(*MI); +} + +static bool breaksVMEMSoftClause(MachineInstr *MI) { + return !SIInstrInfo::isVMEM(*MI) && !SIInstrInfo::isFLAT(*MI); +} + int GCNHazardRecognizer::checkSoftClauseHazards(MachineInstr *MEM) { // SMEM soft clause are only present on VI+, and only matter if xnack is // enabled. @@ -512,7 +515,7 @@ int GCNHazardRecognizer::checkSoftClauseHazards(MachineInstr *MEM) { if (!MI) break; - if (IsSMRD != SIInstrInfo::isSMRD(*MI)) + if (IsSMRD ? breaksSMEMSoftClause(MI) : breaksVMEMSoftClause(MI)) break; addClauseInst(*MI); -- cgit v1.2.3