From 77dbea07356e1ab2f37a777d4d1ddc5dd3e301c2 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Wed, 3 Jan 2024 17:57:07 +0100 Subject: Vendor import of llvm-project main llvmorg-18-init-16003-gfc5f51cf5af4. --- llvm/utils/TableGen/X86DisassemblerTables.cpp | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) (limited to 'llvm/utils/TableGen/X86DisassemblerTables.cpp') diff --git a/llvm/utils/TableGen/X86DisassemblerTables.cpp b/llvm/utils/TableGen/X86DisassemblerTables.cpp index 06e7ec3b9230..9ee1472bdf5c 100644 --- a/llvm/utils/TableGen/X86DisassemblerTables.cpp +++ b/llvm/utils/TableGen/X86DisassemblerTables.cpp @@ -563,6 +563,13 @@ static inline bool inheritsFrom(InstructionContext child, case IC_EVEX_L2_W_XD_KZ_B: case IC_EVEX_L2_W_OPSIZE_KZ_B: return false; + case IC_EVEX_NF: + case IC_EVEX_B_NF: + case IC_EVEX_OPSIZE_NF: + case IC_EVEX_OPSIZE_B_NF: + case IC_EVEX_W_NF: + case IC_EVEX_W_B_NF: + return false; default: errs() << "Unknown instruction class: " << stringForContext((InstructionContext)parent) << "\n"; @@ -889,7 +896,19 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const { if ((index & ATTR_EVEX) && (index & ATTR_OPSIZE) && (index & ATTR_ADSIZE)) o << "IC_EVEX_OPSIZE_ADSIZE"; - else if ((index & ATTR_EVEX) || (index & ATTR_VEX) || (index & ATTR_VEXL)) { + else if (index & ATTR_EVEXNF) { + o << "IC_EVEX"; + if (index & ATTR_REXW) + o << "_W"; + else if (index & ATTR_OPSIZE) + o << "_OPSIZE"; + + if (index & ATTR_EVEXB) + o << "_B"; + + o << "_NF"; + } else if ((index & ATTR_EVEX) || (index & ATTR_VEX) || + (index & ATTR_VEXL)) { if (index & ATTR_EVEX) o << "IC_EVEX"; else -- cgit v1.3