From 7aa6eeb220d89a3c29eb4f768f258622c3803f46 Mon Sep 17 00:00:00 2001 From: Simon Wells Date: Sun, 12 Jan 2025 13:45:05 +0200 Subject: amdsmn(4), amdtemp(4): add support for AMD Ryzen 7 "Cezanne" cpus Tested on AMD 5700G PR: 284009 MFC after: 1 week --- sys/dev/amdtemp/amdtemp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'sys/dev/amdtemp') diff --git a/sys/dev/amdtemp/amdtemp.c b/sys/dev/amdtemp/amdtemp.c index 431890dfce20..0c423e0b2502 100644 --- a/sys/dev/amdtemp/amdtemp.c +++ b/sys/dev/amdtemp/amdtemp.c @@ -112,7 +112,7 @@ struct amdtemp_softc { #define DEVICEID_AMD_HOSTB17H_ROOT 0x1450 #define DEVICEID_AMD_HOSTB17H_M10H_ROOT 0x15d0 #define DEVICEID_AMD_HOSTB17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */ -#define DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630 +#define DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630 /* Also F19H M50H */ #define DEVICEID_AMD_HOSTB19H_M10H_ROOT 0x14a4 #define DEVICEID_AMD_HOSTB19H_M40H_ROOT 0x14b5 #define DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8 @@ -868,6 +868,7 @@ amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model) switch (model) { case 0x00 ... 0x0f: /* Zen3 EPYC "Milan" */ case 0x20 ... 0x2f: /* Zen3 Ryzen "Vermeer" */ + case 0x50 ... 0x5f: /* Zen3 Ryzen "Cezanne" */ maxreg = 8; _Static_assert((int)NUM_CCDS >= 8, ""); break; -- cgit v1.3