From 021a190c88fc41f981a79fe6822bdafbcda14e99 Mon Sep 17 00:00:00 2001 From: Abdelkader Boudih Date: Wed, 17 Jun 2026 07:49:52 -0700 Subject: est: prevent divide-by-zero in est_msr_info When hw.est.msr_info=1 is set, est_msr_info() extracts the bus clock from MSR_PERF_STATUS upper bits. On secondary CPUs, the MSR may contain zero in the frequency ratio field, causing a divide-by-zero panic. Observed in pre Skylake Intel cpu. Reviewed by: adrian Differential Revision: https://reviews.freebsd.org/D57614 --- sys/x86/cpufreq/est.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'sys') diff --git a/sys/x86/cpufreq/est.c b/sys/x86/cpufreq/est.c index 82f35934aa99..804de162ec60 100644 --- a/sys/x86/cpufreq/est.c +++ b/sys/x86/cpufreq/est.c @@ -1181,11 +1181,15 @@ est_msr_info(device_t dev, uint64_t msr, freq_info **freqs, size_t *freqslen) /* Figure out the bus clock. */ freq = atomic_load_acq_64(&tsc_freq) / 1000000; id = msr >> 32; + if ((id >> 8) == 0) + return (EOPNOTSUPP); bus = freq / (id >> 8); device_printf(dev, "Guessed bus clock (high) of %d MHz\n", bus); if (!bus_speed_ok(bus)) { /* We may be running on the low frequency. */ id = msr >> 48; + if ((id >> 8) == 0) + return (EOPNOTSUPP); bus = freq / (id >> 8); device_printf(dev, "Guessed bus clock (low) of %d MHz\n", bus); if (!bus_speed_ok(bus)) -- cgit v1.3