From 4baf5db06ccfdb616abb6a68be99f297f7377bf4 Mon Sep 17 00:00:00 2001 From: Andrew Turner Date: Fri, 2 Jun 2023 15:59:46 +0100 Subject: Add more arm64 ID registers These will be used by bhyve to emulate these registers. Sponsored by: Arm Ltd --- sys/arm64/include/armreg.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'sys') diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index cd5e7b8e1db8..c175c8d7a85c 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -451,6 +451,22 @@ /* ICC_SRE_EL1 */ #define ICC_SRE_EL1_SRE (1U << 0) +/* ID_AA64AFR0_EL1 */ +#define ID_AA64AFR0_EL1 MRS_REG(ID_AA64AFR0_EL1) +#define ID_AA64AFR0_EL1_op0 3 +#define ID_AA64AFR0_EL1_op1 0 +#define ID_AA64AFR0_EL1_CRn 0 +#define ID_AA64AFR0_EL1_CRm 5 +#define ID_AA64AFR0_EL1_op2 4 + +/* ID_AA64AFR1_EL1 */ +#define ID_AA64AFR1_EL1 MRS_REG(ID_AA64AFR1_EL1) +#define ID_AA64AFR1_EL1_op0 3 +#define ID_AA64AFR1_EL1_op1 0 +#define ID_AA64AFR1_EL1_CRn 0 +#define ID_AA64AFR1_EL1_CRm 5 +#define ID_AA64AFR1_EL1_op2 5 + /* ID_AA64DFR0_EL1 */ #define ID_AA64DFR0_EL1 MRS_REG(ID_AA64DFR0_EL1) #define ID_AA64DFR0_EL1_op0 0x3 -- cgit v1.3