From dd58ef019b700900793a1eb48b52123db01b654e Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Wed, 30 Dec 2015 11:46:15 +0000 Subject: Vendor import of llvm trunk r256633: https://llvm.org/svn/llvm-project/llvm/trunk@256633 --- test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll | 1 + test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll | 1 + test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll | 1 + test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll | 1 + test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll | 1 + test/CodeGen/PowerPC/BoolRetToIntTest.ll | 203 +++ test/CodeGen/PowerPC/BreakableToken-reduced.ll | 335 +++++ test/CodeGen/PowerPC/aantidep-def-ec.mir | 117 ++ test/CodeGen/PowerPC/aantidep-inline-asm-use.ll | 305 ++++ test/CodeGen/PowerPC/addisdtprelha-nonr3.mir | 80 ++ test/CodeGen/PowerPC/alias.ll | 4 +- test/CodeGen/PowerPC/bitcasts-direct-move.ll | 83 ++ test/CodeGen/PowerPC/bitreverse.ll | 23 + test/CodeGen/PowerPC/branch-hint.ll | 135 ++ test/CodeGen/PowerPC/coal-sections.ll | 24 + test/CodeGen/PowerPC/crbit-asm-disabled.ll | 16 + test/CodeGen/PowerPC/crbit-asm.ll | 3 +- test/CodeGen/PowerPC/cttz.ll | 2 +- test/CodeGen/PowerPC/dbg.ll | 10 +- test/CodeGen/PowerPC/dyn-alloca-offset.ll | 21 + test/CodeGen/PowerPC/e500-1.ll | 30 + test/CodeGen/PowerPC/emutls_generic.ll | 41 + test/CodeGen/PowerPC/fast-isel-binary.ll | 26 +- test/CodeGen/PowerPC/fast-isel-br-const.ll | 2 +- test/CodeGen/PowerPC/fast-isel-call.ll | 14 +- test/CodeGen/PowerPC/fast-isel-cmp-imm.ll | 34 +- test/CodeGen/PowerPC/fast-isel-const.ll | 2 +- test/CodeGen/PowerPC/fast-isel-conversion-p5.ll | 20 +- test/CodeGen/PowerPC/fast-isel-conversion.ll | 48 +- test/CodeGen/PowerPC/fast-isel-crash.ll | 4 +- test/CodeGen/PowerPC/fast-isel-ext.ll | 20 +- test/CodeGen/PowerPC/fast-isel-fold.ll | 26 +- test/CodeGen/PowerPC/fast-isel-indirectbr.ll | 2 +- test/CodeGen/PowerPC/fast-isel-load-store.ll | 34 +- test/CodeGen/PowerPC/fast-isel-redefinition.ll | 2 +- test/CodeGen/PowerPC/fast-isel-ret.ll | 52 +- test/CodeGen/PowerPC/fast-isel-shifter.ll | 12 +- .../PowerPC/fastisel-gep-promote-before-add.ll | 2 +- .../PowerPC/fma-mutate-register-constraint.ll | 89 ++ .../PowerPC/fp-int-conversions-direct-moves.ll | 24 +- .../PowerPC/fp128-bitcast-after-operation.ll | 137 ++ test/CodeGen/PowerPC/load-shift-combine.ll | 1 + test/CodeGen/PowerPC/long-compare.ll | 2 +- test/CodeGen/PowerPC/machine-combiner.ll | 188 +++ test/CodeGen/PowerPC/mc-instrlat.ll | 25 + test/CodeGen/PowerPC/mcm-13.ll | 27 + test/CodeGen/PowerPC/memcpy-vec.ll | 7 +- test/CodeGen/PowerPC/merge-st-chain-op.ll | 41 + .../PowerPC/p8-scalar_vector_conversions.ll | 1476 ++++++++++++++++++++ test/CodeGen/PowerPC/peephole-align.ll | 335 +++++ test/CodeGen/PowerPC/ppc-shrink-wrapping.ll | 784 +++++++++++ test/CodeGen/PowerPC/ppc32-i1-vaarg.ll | 2 +- test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll | 8 +- test/CodeGen/PowerPC/ppcsoftops.ll | 50 + test/CodeGen/PowerPC/pr17168.ll | 366 ++--- test/CodeGen/PowerPC/pr24546.ll | 22 +- test/CodeGen/PowerPC/pr24636.ll | 41 + test/CodeGen/PowerPC/pr25157-peephole.ll | 61 + test/CodeGen/PowerPC/preincprep-nontrans-crash.ll | 94 ++ test/CodeGen/PowerPC/qpx-unal-cons-lds.ll | 217 +++ test/CodeGen/PowerPC/retaddr2.ll | 6 +- test/CodeGen/PowerPC/rm-zext.ll | 6 +- test/CodeGen/PowerPC/rotl-rotr-crash.ll | 12 + test/CodeGen/PowerPC/sdiv-pow2.ll | 8 +- .../selectiondag-extload-computeknownbits.ll | 12 + test/CodeGen/PowerPC/seteq-0.ll | 2 +- test/CodeGen/PowerPC/sjlj.ll | 20 +- test/CodeGen/PowerPC/stack-realign.ll | 26 +- test/CodeGen/PowerPC/stackmap-frame-setup.ll | 20 + test/CodeGen/PowerPC/swaps-le-5.ll | 4 +- test/CodeGen/PowerPC/swaps-le-6.ll | 42 + test/CodeGen/PowerPC/unal-vec-ldst.ll | 580 ++++++++ test/CodeGen/PowerPC/unal-vec-negarith.ll | 17 + test/CodeGen/PowerPC/unwind-dw2-g.ll | 6 +- test/CodeGen/PowerPC/variable_elem_vec_extracts.ll | 114 ++ test/CodeGen/PowerPC/vec-asm-disabled.ll | 14 + test/CodeGen/PowerPC/vec_add_sub_quadword.ll | 6 +- .../PowerPC/vector-merge-store-fp-constants.ll | 28 + test/CodeGen/PowerPC/vsx.ll | 5 +- test/CodeGen/PowerPC/vsx_insert_extract_le.ll | 6 +- test/CodeGen/PowerPC/vsx_scalar_ld_st.ll | 6 +- test/CodeGen/PowerPC/vsx_shuffle_le.ll | 20 +- 82 files changed, 6254 insertions(+), 440 deletions(-) create mode 100644 test/CodeGen/PowerPC/BoolRetToIntTest.ll create mode 100644 test/CodeGen/PowerPC/BreakableToken-reduced.ll create mode 100644 test/CodeGen/PowerPC/aantidep-def-ec.mir create mode 100644 test/CodeGen/PowerPC/aantidep-inline-asm-use.ll create mode 100644 test/CodeGen/PowerPC/addisdtprelha-nonr3.mir create mode 100644 test/CodeGen/PowerPC/bitcasts-direct-move.ll create mode 100644 test/CodeGen/PowerPC/bitreverse.ll create mode 100644 test/CodeGen/PowerPC/branch-hint.ll create mode 100644 test/CodeGen/PowerPC/coal-sections.ll create mode 100644 test/CodeGen/PowerPC/crbit-asm-disabled.ll create mode 100644 test/CodeGen/PowerPC/dyn-alloca-offset.ll create mode 100644 test/CodeGen/PowerPC/e500-1.ll create mode 100644 test/CodeGen/PowerPC/emutls_generic.ll create mode 100644 test/CodeGen/PowerPC/fma-mutate-register-constraint.ll create mode 100644 test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll create mode 100644 test/CodeGen/PowerPC/machine-combiner.ll create mode 100644 test/CodeGen/PowerPC/mc-instrlat.ll create mode 100644 test/CodeGen/PowerPC/mcm-13.ll create mode 100644 test/CodeGen/PowerPC/merge-st-chain-op.ll create mode 100644 test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll create mode 100644 test/CodeGen/PowerPC/peephole-align.ll create mode 100644 test/CodeGen/PowerPC/ppc-shrink-wrapping.ll create mode 100644 test/CodeGen/PowerPC/ppcsoftops.ll create mode 100644 test/CodeGen/PowerPC/pr24636.ll create mode 100644 test/CodeGen/PowerPC/pr25157-peephole.ll create mode 100644 test/CodeGen/PowerPC/preincprep-nontrans-crash.ll create mode 100644 test/CodeGen/PowerPC/qpx-unal-cons-lds.ll create mode 100644 test/CodeGen/PowerPC/rotl-rotr-crash.ll create mode 100644 test/CodeGen/PowerPC/selectiondag-extload-computeknownbits.ll create mode 100644 test/CodeGen/PowerPC/stackmap-frame-setup.ll create mode 100644 test/CodeGen/PowerPC/swaps-le-6.ll create mode 100644 test/CodeGen/PowerPC/unal-vec-ldst.ll create mode 100644 test/CodeGen/PowerPC/unal-vec-negarith.ll create mode 100644 test/CodeGen/PowerPC/variable_elem_vec_extracts.ll create mode 100644 test/CodeGen/PowerPC/vec-asm-disabled.ll create mode 100644 test/CodeGen/PowerPC/vector-merge-store-fp-constants.ll (limited to 'test/CodeGen/PowerPC') diff --git a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll index fde330321aa4..d20e3b05c091 100644 --- a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll +++ b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s +; REQUIRES: default_triple define void @iterative_hash_host_wide_int() { %zero = alloca i32 ; [#uses=2] diff --git a/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll index c63fd9ae1700..3d5fa52d0abd 100644 --- a/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll +++ b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s +; REQUIRES: default_triple %struct..0anon = type { i32 } %struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] } diff --git a/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll b/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll index 0e7709857406..c064c273173f 100644 --- a/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll +++ b/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=ppc64 ; RUN: llc < %s -march=ppc32 ; RUN: llc < %s +; REQUIRES: default_triple define void @bitap() { entry: diff --git a/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll index 9660d450cb4c..8536dda0a9ba 100644 --- a/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll +++ b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=ppc64 ; RUN: llc < %s -march=ppc32 ; RUN: llc < %s +; REQUIRES: default_triple @qsz.b = external global i1 ; [#uses=1] diff --git a/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll b/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll index 4830ca60f9ff..aa39dfd03748 100644 --- a/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll +++ b/test/CodeGen/PowerPC/2007-11-19-VectorSplitting.ll @@ -2,6 +2,7 @@ ; RUN: llc < %s -march=ppc32 -mcpu=g3 ; RUN: llc < %s -march=ppc32 -mcpu=g5 ; PR1811 +; REQUIRES: default_triple define void @execute_shader(<4 x float>* %OUT, <4 x float>* %IN, <4 x float>* %CONST) { diff --git a/test/CodeGen/PowerPC/BoolRetToIntTest.ll b/test/CodeGen/PowerPC/BoolRetToIntTest.ll new file mode 100644 index 000000000000..a7b79789b4ca --- /dev/null +++ b/test/CodeGen/PowerPC/BoolRetToIntTest.ll @@ -0,0 +1,203 @@ +; RUN: opt -bool-ret-to-int -S -o - < %s | FileCheck %s + +target datalayout = "e-m:e-i64:64-n32:64" +target triple = "powerpc64le-unknown-linux-gnu" + +; CHECK-LABEL: notBoolRet +define signext i32 @notBoolRet() { +entry: +; CHECK: ret i32 1 + ret i32 1 +} + +; CHECK-LABEL: find +define zeroext i1 @find(i8** readonly %begin, i8** readnone %end, i1 (i8*)* nocapture %hasProp) { +entry: + %cmp.4 = icmp eq i8** %begin, %end + br i1 %cmp.4, label %cleanup, label %for.body.preheader + +for.body.preheader: ; preds = %entry + br label %for.body + +for.cond: ; preds = %for.body + %cmp = icmp eq i8** %incdec.ptr, %end + br i1 %cmp, label %cleanup.loopexit, label %for.body + +for.body: ; preds = %for.body.preheader, %for.cond + %curr.05 = phi i8** [ %incdec.ptr, %for.cond ], [ %begin, %for.body.preheader ] + %0 = load i8*, i8** %curr.05, align 8 + %call = tail call zeroext i1 %hasProp(i8* %0) + %incdec.ptr = getelementptr inbounds i8*, i8** %curr.05, i64 1 + br i1 %call, label %cleanup.loopexit, label %for.cond + +cleanup.loopexit: ; preds = %for.body, %for.cond +; CHECK: [[PHI:%.+]] = phi i32 [ 1, %for.body ], [ 0, %for.cond ] + %cleanup.dest.slot.0.ph = phi i1 [ true, %for.body ], [ false, %for.cond ] + br label %cleanup + +cleanup: ; preds = %cleanup.loopexit, %entry +; CHECK: = phi i32 [ 0, %entry ], [ [[PHI]], %cleanup.loopexit ] + %cleanup.dest.slot.0 = phi i1 [ false, %entry ], [ %cleanup.dest.slot.0.ph, %cleanup.loopexit ] +; CHECK: [[REG:%.+]] = trunc i32 {{%.+}} to i1 +; CHECK: ret i1 [[REG]] + ret i1 %cleanup.dest.slot.0 +} + +; CHECK-LABEL: retFalse +define zeroext i1 @retFalse() { +entry: +; CHECK: ret i1 false + ret i1 false +} + +; CHECK-LABEL: retCvtFalse +define zeroext i1 @retCvtFalse() { +entry: +; CHECK: ret i1 false + ret i1 trunc(i32 0 to i1) +} + +; CHECK-LABEL: find_cont +define void @find_cont(i8** readonly %begin, i8** readnone %end, i1 (i8*)* nocapture %hasProp, void (i1)* nocapture %cont) { +entry: + %cmp.4 = icmp eq i8** %begin, %end + br i1 %cmp.4, label %cleanup, label %for.body.preheader + +for.body.preheader: ; preds = %entry + br label %for.body + +for.cond: ; preds = %for.body + %cmp = icmp eq i8** %incdec.ptr, %end + br i1 %cmp, label %cleanup.loopexit, label %for.body + +for.body: ; preds = %for.body.preheader, %for.cond + %curr.05 = phi i8** [ %incdec.ptr, %for.cond ], [ %begin, %for.body.preheader ] + %0 = load i8*, i8** %curr.05, align 8 + %call = tail call zeroext i1 %hasProp(i8* %0) + %incdec.ptr = getelementptr inbounds i8*, i8** %curr.05, i64 1 + br i1 %call, label %cleanup.loopexit, label %for.cond + +cleanup.loopexit: ; preds = %for.body, %for.cond +; CHECK: [[PHI:%.+]] = phi i32 [ 1, %for.body ], [ 0, %for.cond ] + %cleanup.dest.slot.0.ph = phi i1 [ true, %for.body ], [ false, %for.cond ] + br label %cleanup + +cleanup: ; preds = %cleanup.loopexit, %entry +; CHECK: = phi i32 [ 0, %entry ], [ [[PHI]], %cleanup.loopexit ] + %cleanup.dest.slot.0 = phi i1 [ false, %entry ], [ %cleanup.dest.slot.0.ph, %cleanup.loopexit ] +; CHECK: [[REG:%.+]] = trunc i32 {{%.+}} to i1 +; CHECK: call void %cont(i1 [[REG]] + tail call void %cont(i1 %cleanup.dest.slot.0) + ret void +} + +; CHECK-LABEL: find_cont_ret +define zeroext i1 @find_cont_ret(i8** readonly %begin, i8** readnone %end, i1 (i8*)* nocapture %hasProp, void (i1)* nocapture %cont) { +entry: + %cmp.4 = icmp eq i8** %begin, %end + br i1 %cmp.4, label %cleanup, label %for.body.preheader + +for.body.preheader: ; preds = %entry + br label %for.body + +for.cond: ; preds = %for.body + %cmp = icmp eq i8** %incdec.ptr, %end + br i1 %cmp, label %cleanup.loopexit, label %for.body + +for.body: ; preds = %for.body.preheader, %for.cond + %curr.05 = phi i8** [ %incdec.ptr, %for.cond ], [ %begin, %for.body.preheader ] + %0 = load i8*, i8** %curr.05, align 8 + %call = tail call zeroext i1 %hasProp(i8* %0) + %incdec.ptr = getelementptr inbounds i8*, i8** %curr.05, i64 1 + br i1 %call, label %cleanup.loopexit, label %for.cond + +cleanup.loopexit: ; preds = %for.body, %for.cond +; CHECK: [[PHI:%.+]] = phi i32 [ 1, %for.body ], [ 0, %for.cond ] + %cleanup.dest.slot.0.ph = phi i1 [ true, %for.body ], [ false, %for.cond ] + br label %cleanup + +cleanup: ; preds = %cleanup.loopexit, %entry +; CHECK: = phi i32 [ 0, %entry ], [ [[PHI]], %cleanup.loopexit ] + %cleanup.dest.slot.0 = phi i1 [ false, %entry ], [ %cleanup.dest.slot.0.ph, %cleanup.loopexit ] +; CHECK: [[REG:%.+]] = trunc i32 {{%.+}} to i1 +; CHECK: call void %cont(i1 [[REG]] + tail call void %cont(i1 %cleanup.dest.slot.0) +; CHECK: [[REG:%.+]] = trunc i32 {{%.+}} to i1 +; CHECK: ret i1 [[REG]] + ret i1 %cleanup.dest.slot.0 +} + +; CHECK-LABEL: arg_operand +define zeroext i1 @arg_operand(i1 %operand) { +entry: + br i1 %operand, label %foo, label %cleanup + +foo: + br label %cleanup + +cleanup: +; CHECK: [[REG:%.+]] = trunc i32 {{%.+}} to i1 +; CHECK: ret i1 [[REG]] + %result = phi i1 [ false, %foo ], [ %operand, %entry ] + ret i1 %result +} + +; CHECK-LABEL: bad_use +define zeroext i1 @bad_use(i1 %operand) { +entry: + br i1 %operand, label %foo, label %cleanup + +foo: + br label %cleanup + +cleanup: +; CHECK: [[REG:%.+]] = phi i1 +; CHECK: ret i1 [[REG]] + %result = phi i1 [ false, %foo], [ true, %entry ] + %0 = icmp eq i1 %result, %operand + ret i1 %result +} + +; CHECK-LABEL: bad_use_closure +define zeroext i1 @bad_use_closure(i1 %operand) { +entry: + br i1 %operand, label %foo, label %cleanup + +foo: + %bar = phi i1 [ false, %entry ] + %0 = icmp eq i1 %bar, %operand + br label %cleanup + +cleanup: +; CHECK: [[REG:%.+]] = phi i1 [ true +; CHECK: ret i1 [[REG]] + %result = phi i1 [ true, %entry ], [ %bar, %foo] + ret i1 %result +} + +; CHECK-LABEL: arg_test +define zeroext i1 @arg_test(i1 %operand) { +entry: + br i1 %operand, label %foo, label %cleanup + +foo: + %bar = phi i1 [ false, %entry ] + br label %cleanup + +; CHECK-LABEL: cleanup +cleanup: +; CHECK: [[REG:%.+]] = trunc i32 {{%.+}} to i1 +; CHECK: ret i1 [[REG]] + %result = phi i1 [ %bar, %foo], [ %operand, %entry ] + ret i1 %result +} + +declare zeroext i1 @return_i1() + +; CHECK-LABEL: call_test +define zeroext i1 @call_test() { +; CHECK: [[REG:%.+]] = call i1 + %result = call i1 @return_i1() +; CHECK: ret i1 [[REG]] + ret i1 %result +} \ No newline at end of file diff --git a/test/CodeGen/PowerPC/BreakableToken-reduced.ll b/test/CodeGen/PowerPC/BreakableToken-reduced.ll new file mode 100644 index 000000000000..2077dbb820f7 --- /dev/null +++ b/test/CodeGen/PowerPC/BreakableToken-reduced.ll @@ -0,0 +1,335 @@ +; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -enable-shrink-wrap=true %s -o - | FileCheck %s --check-prefix=CHECK +; +; Test the use of a non-R0 register to save/restore the LR in function +; prologue/epilogue. +; This problem can occur as a result of shrink wrapping, where the function +; prologue and epilogue are moved from the beginning/ending of the function. If +; register R0 is used before the prologue/epilogue blocks, then it cannot be +; used to save/restore the LR. +; +; TODO: Convert this to an MIR test once the infrastructure can support it. +; To convert this to an MIR pass, generate MIR after register allocation +; but before shrink wrapping and verify that has been used in the body of +; the function. This can be done with something like: +; llc -stop-after stack-slot-coloring BreakableToken-reduced.ll > BreakableToken-reduced.mir +; +; The resulting MIR file can then be used as input to llc, and only run +; shrink wrapping and Prologue/Epilogue insertion on it. For example: +; llc -start-after stack-slot-coloring -stop-after prologepilog BreakableToken-reduced.mir +; +; Verify in the resulting code that R0 is not used in the prologue/epilogue. +; +; This currently cannot be done because the PrologEpilogInserter pass has +; a dependency on the TargetPassConfig and StackProtector classes, which +; are currently not serialized when generating the MIR. +; + +; ModuleID = 'BreakableToken.cpp' +target datalayout = "e-m:e-i64:64-n32:64" +target triple = "powerpc64le-unknown-linux-gnu" + +%"class.clang::format::BreakableStringLiteral" = type { %"class.clang::format::BreakableSingleLineToken" } +%"class.clang::format::BreakableSingleLineToken" = type { %"class.clang::format::BreakableToken", i32, %"class.llvm::StringRef", %"class.llvm::StringRef", %"class.llvm::StringRef" } +%"class.clang::format::BreakableToken" = type { i32 (...)**, %"struct.clang::format::FormatToken"*, i32, i8, i32, %"struct.clang::format::FormatStyle"* } +%"class.llvm::StringRef" = type { i8*, i64 } +%"struct.clang::format::FormatToken" = type <{ %"class.clang::Token", i32, i8, [3 x i8], %"class.clang::SourceRange", i32, i32, i32, i8, i8, i8, i8, %"class.llvm::StringRef", i8, [3 x i8], i32, i32, i32, i8, i8, [2 x i8], i32, i32, i16, [2 x i8], %"class.std::unique_ptr", i32, i32, i32, i32, i32, i32, i32, i32, %"class.llvm::SmallVector", i32, i8, i8, [2 x i8], i32, i8, i8, [2 x i8], %"struct.clang::format::FormatToken"*, %"struct.clang::format::FormatToken"*, %"struct.clang::format::FormatToken"*, %"class.llvm::SmallVector.6", i32, i8, [3 x i8] }> +%"class.clang::Token" = type <{ i32, i32, i8*, i16, i16, [4 x i8] }> +%"class.clang::SourceRange" = type { %"class.clang::SourceLocation", %"class.clang::SourceLocation" } +%"class.clang::SourceLocation" = type { i32 } +%"class.std::unique_ptr" = type { %"class.std::tuple" } +%"class.std::tuple" = type { %"struct.std::_Tuple_impl" } +%"struct.std::_Tuple_impl" = type { %"struct.std::_Head_base.2" } +%"struct.std::_Head_base.2" = type { %"class.clang::format::TokenRole"* } +%"class.clang::format::TokenRole" = type { i32 (...)**, %"struct.clang::format::FormatStyle"* } +%"class.llvm::SmallVector" = type { %"class.llvm::SmallVectorImpl.base", %"struct.llvm::SmallVectorStorage" } +%"class.llvm::SmallVectorImpl.base" = type { %"class.llvm::SmallVectorTemplateBase.base" } +%"class.llvm::SmallVectorTemplateBase.base" = type { %"class.llvm::SmallVectorTemplateCommon.base" } +%"class.llvm::SmallVectorTemplateCommon.base" = type <{ %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion" }> +%"class.llvm::SmallVectorBase" = type { i8*, i8*, i8* } +%"struct.llvm::AlignedCharArrayUnion" = type { %"struct.llvm::AlignedCharArray" } +%"struct.llvm::AlignedCharArray" = type { [4 x i8] } +%"struct.llvm::SmallVectorStorage" = type { [3 x %"struct.llvm::AlignedCharArrayUnion"] } +%"class.llvm::SmallVector.6" = type <{ %"class.llvm::SmallVectorImpl.7", %"struct.llvm::SmallVectorStorage.12", [7 x i8] }> +%"class.llvm::SmallVectorImpl.7" = type { %"class.llvm::SmallVectorTemplateBase.8" } +%"class.llvm::SmallVectorTemplateBase.8" = type { %"class.llvm::SmallVectorTemplateCommon.9" } +%"class.llvm::SmallVectorTemplateCommon.9" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.10" } +%"struct.llvm::AlignedCharArrayUnion.10" = type { %"struct.llvm::AlignedCharArray.11" } +%"struct.llvm::AlignedCharArray.11" = type { [8 x i8] } +%"struct.llvm::SmallVectorStorage.12" = type { i8 } +%"struct.clang::format::FormatStyle" = type { i32, i8, i8, i8, i8, i8, i8, i8, i8, i32, i8, i8, i32, i8, i8, i8, i8, i32, i32, i8, i8, i32, %"class.std::basic_string", i8, i32, i32, i8, i8, i8, i8, %"class.std::vector", i8, i32, i8, i8, i32, %"class.std::basic_string", %"class.std::basic_string", i32, i32, i32, i8, i8, i32, i32, i32, i32, i32, i32, i32, i8, i8, i32, i8, i32, i8, i8, i8, i8, i8, i32, i32, i32 } +%"class.std::vector" = type { %"struct.std::_Vector_base" } +%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base, std::allocator > >::_Vector_impl" } +%"struct.std::_Vector_base, std::allocator > >::_Vector_impl" = type { %"class.std::basic_string"*, %"class.std::basic_string"*, %"class.std::basic_string"* } +%"class.std::basic_string" = type { %"struct.std::basic_string, std::allocator >::_Alloc_hider" } +%"struct.std::basic_string, std::allocator >::_Alloc_hider" = type { i8* } +%"struct.llvm::AlignedCharArray.52" = type { [16 x i8] } +%"class.clang::format::WhitespaceManager" = type <{ %"class.llvm::SmallVector.13", %"class.clang::SourceManager"*, %"class.std::set", %"struct.clang::format::FormatStyle"*, i8, [7 x i8] }> +%"class.llvm::SmallVector.13" = type { %"class.llvm::SmallVectorImpl.14", %"struct.llvm::SmallVectorStorage.19" } +%"class.llvm::SmallVectorImpl.14" = type { %"class.llvm::SmallVectorTemplateBase.15" } +%"class.llvm::SmallVectorTemplateBase.15" = type { %"class.llvm::SmallVectorTemplateCommon.16" } +%"class.llvm::SmallVectorTemplateCommon.16" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.17" } +%"struct.llvm::AlignedCharArrayUnion.17" = type { %"struct.llvm::AlignedCharArray.18" } +%"struct.llvm::AlignedCharArray.18" = type { [88 x i8] } +%"struct.llvm::SmallVectorStorage.19" = type { [15 x %"struct.llvm::AlignedCharArrayUnion.17"] } +%"class.clang::SourceManager" = type { %"class.llvm::RefCountedBase", %"class.clang::DiagnosticsEngine"*, %"class.clang::FileManager"*, %"class.llvm::BumpPtrAllocatorImpl", %"class.llvm::DenseMap.65", i8, i8, %"class.std::unique_ptr.78", %"class.std::vector.94", %"class.llvm::SmallVector.99", %"class.llvm::SmallVector.99", i32, i32, %"class.std::vector.107", %"class.clang::ExternalSLocEntrySource"*, %"class.clang::FileID", %"class.clang::LineTableInfo"*, %"class.clang::FileID", %"class.clang::SrcMgr::ContentCache"*, i32, i32, %"class.clang::FileID", %"class.clang::FileID", i32, i32, %"class.llvm::DenseMap.111", %"class.llvm::DenseMap.115", %"class.clang::InBeforeInTUCacheEntry", %"class.std::unique_ptr.119", %"class.std::unique_ptr.127", %"class.llvm::DenseMap.135", %"class.llvm::SmallVector.139" } +%"class.llvm::RefCountedBase" = type { i32 } +%"class.clang::DiagnosticsEngine" = type opaque +%"class.clang::FileManager" = type { %"class.llvm::RefCountedBase.20", %"class.llvm::IntrusiveRefCntPtr", %"class.clang::FileSystemOptions", %"class.std::map", %"class.std::map.24", %"class.llvm::SmallVector.29", %"class.llvm::SmallVector.35", %"class.llvm::StringMap", %"class.llvm::StringMap.56", %"class.llvm::DenseMap", %"class.llvm::BumpPtrAllocatorImpl", i32, i32, i32, i32, i32, %"class.std::unique_ptr.57" } +%"class.llvm::RefCountedBase.20" = type { i32 } +%"class.llvm::IntrusiveRefCntPtr" = type { %"class.clang::vfs::FileSystem"* } +%"class.clang::vfs::FileSystem" = type <{ i32 (...)**, %"class.llvm::ThreadSafeRefCountedBase", [4 x i8] }> +%"class.llvm::ThreadSafeRefCountedBase" = type { %"struct.std::atomic" } +%"struct.std::atomic" = type { %"struct.std::__atomic_base" } +%"struct.std::__atomic_base" = type { i32 } +%"class.clang::FileSystemOptions" = type { %"class.std::basic_string" } +%"class.std::map" = type { %"class.std::_Rb_tree" } +%"class.std::_Rb_tree" = type { %"struct.std::_Rb_tree, std::_Select1st >, std::less, std::allocator > >::_Rb_tree_impl" } +%"struct.std::_Rb_tree, std::_Select1st >, std::less, std::allocator > >::_Rb_tree_impl" = type { %"struct.std::less", %"struct.std::_Rb_tree_node_base", i64 } +%"struct.std::less" = type { i8 } +%"struct.std::_Rb_tree_node_base" = type { i32, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"* } +%"class.std::map.24" = type { %"class.std::_Rb_tree.25" } +%"class.std::_Rb_tree.25" = type { %"struct.std::_Rb_tree, std::_Select1st >, std::less, std::allocator > >::_Rb_tree_impl" } +%"struct.std::_Rb_tree, std::_Select1st >, std::less, std::allocator > >::_Rb_tree_impl" = type { %"struct.std::less", %"struct.std::_Rb_tree_node_base", i64 } +%"class.llvm::SmallVector.29" = type { %"class.llvm::SmallVectorImpl.30", %"struct.llvm::SmallVectorStorage.34" } +%"class.llvm::SmallVectorImpl.30" = type { %"class.llvm::SmallVectorTemplateBase.31" } +%"class.llvm::SmallVectorTemplateBase.31" = type { %"class.llvm::SmallVectorTemplateCommon.32" } +%"class.llvm::SmallVectorTemplateCommon.32" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.33" } +%"struct.llvm::AlignedCharArrayUnion.33" = type { %"struct.llvm::AlignedCharArray.11" } +%"struct.llvm::SmallVectorStorage.34" = type { [3 x %"struct.llvm::AlignedCharArrayUnion.33"] } +%"class.llvm::SmallVector.35" = type { %"class.llvm::SmallVectorImpl.36", %"struct.llvm::SmallVectorStorage.40" } +%"class.llvm::SmallVectorImpl.36" = type { %"class.llvm::SmallVectorTemplateBase.37" } +%"class.llvm::SmallVectorTemplateBase.37" = type { %"class.llvm::SmallVectorTemplateCommon.38" } +%"class.llvm::SmallVectorTemplateCommon.38" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.39" } +%"struct.llvm::AlignedCharArrayUnion.39" = type { %"struct.llvm::AlignedCharArray.11" } +%"struct.llvm::SmallVectorStorage.40" = type { [3 x %"struct.llvm::AlignedCharArrayUnion.39"] } +%"class.llvm::StringMap" = type { %"class.llvm::StringMapImpl", %"class.llvm::BumpPtrAllocatorImpl" } +%"class.llvm::StringMapImpl" = type { %"class.llvm::StringMapEntryBase"**, i32, i32, i32, i32 } +%"class.llvm::StringMapEntryBase" = type { i32 } +%"class.llvm::StringMap.56" = type { %"class.llvm::StringMapImpl", %"class.llvm::BumpPtrAllocatorImpl" } +%"class.llvm::DenseMap" = type <{ %"struct.llvm::detail::DenseMapPair"*, i32, i32, i32, [4 x i8] }> +%"struct.llvm::detail::DenseMapPair" = type opaque +%"class.std::unique_ptr.57" = type { %"class.std::tuple.58" } +%"class.std::tuple.58" = type { %"struct.std::_Tuple_impl.59" } +%"struct.std::_Tuple_impl.59" = type { %"struct.std::_Head_base.64" } +%"struct.std::_Head_base.64" = type { %"class.clang::FileSystemStatCache"* } +%"class.clang::FileSystemStatCache" = type opaque +%"class.llvm::BumpPtrAllocatorImpl" = type <{ i8*, i8*, %"class.llvm::SmallVector.41", %"class.llvm::SmallVector.47", i64, %"class.llvm::MallocAllocator", [7 x i8] }> +%"class.llvm::SmallVector.41" = type { %"class.llvm::SmallVectorImpl.42", %"struct.llvm::SmallVectorStorage.46" } +%"class.llvm::SmallVectorImpl.42" = type { %"class.llvm::SmallVectorTemplateBase.43" } +%"class.llvm::SmallVectorTemplateBase.43" = type { %"class.llvm::SmallVectorTemplateCommon.44" } +%"class.llvm::SmallVectorTemplateCommon.44" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.45" } +%"struct.llvm::AlignedCharArrayUnion.45" = type { %"struct.llvm::AlignedCharArray.11" } +%"struct.llvm::SmallVectorStorage.46" = type { [3 x %"struct.llvm::AlignedCharArrayUnion.45"] } +%"class.llvm::SmallVector.47" = type <{ %"class.llvm::SmallVectorImpl.48", %"struct.llvm::SmallVectorStorage.53", [7 x i8] }> +%"class.llvm::SmallVectorImpl.48" = type { %"class.llvm::SmallVectorTemplateBase.49" } +%"class.llvm::SmallVectorTemplateBase.49" = type { %"class.llvm::SmallVectorTemplateCommon.50" } +%"class.llvm::SmallVectorTemplateCommon.50" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.51" } +%"struct.llvm::AlignedCharArrayUnion.51" = type { %"struct.llvm::AlignedCharArray.52" } +%"struct.llvm::SmallVectorStorage.53" = type { i8 } +%"class.llvm::MallocAllocator" = type { i8 } +%"class.llvm::DenseMap.65" = type <{ %"struct.llvm::detail::DenseMapPair.67"*, i32, i32, i32, [4 x i8] }> +%"struct.llvm::detail::DenseMapPair.67" = type { %"struct.std::pair.68" } +%"struct.std::pair.68" = type { %"class.clang::FileEntry"*, %"class.clang::SrcMgr::ContentCache"* } +%"class.clang::FileEntry" = type { i8*, i64, i64, %"class.clang::DirectoryEntry"*, i32, %"class.llvm::sys::fs::UniqueID", i8, i8, i8, %"class.std::unique_ptr.69" } +%"class.clang::DirectoryEntry" = type { i8* } +%"class.llvm::sys::fs::UniqueID" = type { i64, i64 } +%"class.std::unique_ptr.69" = type { %"class.std::tuple.70" } +%"class.std::tuple.70" = type { %"struct.std::_Tuple_impl.71" } +%"struct.std::_Tuple_impl.71" = type { %"struct.std::_Head_base.76" } +%"struct.std::_Head_base.76" = type { %"class.clang::vfs::File"* } +%"class.clang::vfs::File" = type { i32 (...)** } +%"class.std::unique_ptr.78" = type { %"class.std::tuple.79" } +%"class.std::tuple.79" = type { %"struct.std::_Tuple_impl.80" } +%"struct.std::_Tuple_impl.80" = type { %"struct.std::_Head_base.85" } +%"struct.std::_Head_base.85" = type { %"struct.clang::SourceManager::OverriddenFilesInfoTy"* } +%"struct.clang::SourceManager::OverriddenFilesInfoTy" = type { %"class.llvm::DenseMap.86", %"class.llvm::DenseSet" } +%"class.llvm::DenseMap.86" = type <{ %"struct.llvm::detail::DenseMapPair.88"*, i32, i32, i32, [4 x i8] }> +%"struct.llvm::detail::DenseMapPair.88" = type { %"struct.std::pair.89" } +%"struct.std::pair.89" = type { %"class.clang::FileEntry"*, %"class.clang::FileEntry"* } +%"class.llvm::DenseSet" = type { %"class.llvm::DenseMap.91" } +%"class.llvm::DenseMap.91" = type <{ %"class.llvm::detail::DenseSetPair"*, i32, i32, i32, [4 x i8] }> +%"class.llvm::detail::DenseSetPair" = type { %"class.clang::FileEntry"* } +%"class.std::vector.94" = type { %"struct.std::_Vector_base.95" } +%"struct.std::_Vector_base.95" = type { %"struct.std::_Vector_base >::_Vector_impl" } +%"struct.std::_Vector_base >::_Vector_impl" = type { %"class.clang::SrcMgr::ContentCache"**, %"class.clang::SrcMgr::ContentCache"**, %"class.clang::SrcMgr::ContentCache"** } +%"class.llvm::SmallVector.99" = type <{ %"class.llvm::SmallVectorImpl.100", %"struct.llvm::SmallVectorStorage.105", [7 x i8] }> +%"class.llvm::SmallVectorImpl.100" = type { %"class.llvm::SmallVectorTemplateBase.101" } +%"class.llvm::SmallVectorTemplateBase.101" = type { %"class.llvm::SmallVectorTemplateCommon.102" } +%"class.llvm::SmallVectorTemplateCommon.102" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.103" } +%"struct.llvm::AlignedCharArrayUnion.103" = type { %"struct.llvm::AlignedCharArray.104" } +%"struct.llvm::AlignedCharArray.104" = type { [24 x i8] } +%"struct.llvm::SmallVectorStorage.105" = type { i8 } +%"class.std::vector.107" = type { %"struct.std::_Bvector_base" } +%"struct.std::_Bvector_base" = type { %"struct.std::_Bvector_base >::_Bvector_impl" } +%"struct.std::_Bvector_base >::_Bvector_impl" = type { %"struct.std::_Bit_iterator", %"struct.std::_Bit_iterator", i64* } +%"struct.std::_Bit_iterator" = type { %"struct.std::_Bit_iterator_base.base", [4 x i8] } +%"struct.std::_Bit_iterator_base.base" = type <{ i64*, i32 }> +%"class.clang::ExternalSLocEntrySource" = type { i32 (...)** } +%"class.clang::LineTableInfo" = type opaque +%"class.clang::SrcMgr::ContentCache" = type <{ %"class.llvm::PointerIntPair", %"class.clang::FileEntry"*, %"class.clang::FileEntry"*, i32*, [5 x i8], [3 x i8] }> +%"class.llvm::PointerIntPair" = type { i64 } +%"class.clang::FileID" = type { i32 } +%"class.llvm::DenseMap.111" = type <{ %"struct.llvm::detail::DenseMapPair.113"*, i32, i32, i32, [4 x i8] }> +%"struct.llvm::detail::DenseMapPair.113" = type opaque +%"class.llvm::DenseMap.115" = type <{ %"struct.llvm::detail::DenseMapPair.117"*, i32, i32, i32, [4 x i8] }> +%"struct.llvm::detail::DenseMapPair.117" = type opaque +%"class.clang::InBeforeInTUCacheEntry" = type { %"class.clang::FileID", %"class.clang::FileID", i8, %"class.clang::FileID", i32, i32 } +%"class.std::unique_ptr.119" = type { %"class.std::tuple.120" } +%"class.std::tuple.120" = type { %"struct.std::_Tuple_impl.121" } +%"struct.std::_Tuple_impl.121" = type { %"struct.std::_Head_base.126" } +%"struct.std::_Head_base.126" = type { %"class.llvm::MemoryBuffer"* } +%"class.llvm::MemoryBuffer" = type { i32 (...)**, i8*, i8* } +%"class.std::unique_ptr.127" = type { %"class.std::tuple.128" } +%"class.std::tuple.128" = type { %"struct.std::_Tuple_impl.129" } +%"struct.std::_Tuple_impl.129" = type { %"struct.std::_Head_base.134" } +%"struct.std::_Head_base.134" = type { %"class.clang::SrcMgr::ContentCache"* } +%"class.llvm::DenseMap.135" = type <{ %"struct.llvm::detail::DenseMapPair.137"*, i32, i32, i32, [4 x i8] }> +%"struct.llvm::detail::DenseMapPair.137" = type opaque +%"class.llvm::SmallVector.139" = type { %"class.llvm::SmallVectorImpl.140", %"struct.llvm::SmallVectorStorage.144" } +%"class.llvm::SmallVectorImpl.140" = type { %"class.llvm::SmallVectorTemplateBase.141" } +%"class.llvm::SmallVectorTemplateBase.141" = type { %"class.llvm::SmallVectorTemplateCommon.142" } +%"class.llvm::SmallVectorTemplateCommon.142" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.143" } +%"struct.llvm::AlignedCharArrayUnion.143" = type { %"struct.llvm::AlignedCharArray.104" } +%"struct.llvm::SmallVectorStorage.144" = type { [1 x %"struct.llvm::AlignedCharArrayUnion.143"] } +%"class.std::set" = type { %"class.std::_Rb_tree.145" } +%"class.std::_Rb_tree.145" = type { %"struct.std::_Rb_tree, std::less, std::allocator >::_Rb_tree_impl" } +%"struct.std::_Rb_tree, std::less, std::allocator >::_Rb_tree_impl" = type { %"struct.std::less.149", %"struct.std::_Rb_tree_node_base", i64 } +%"struct.std::less.149" = type { i8 } + + +; Function Attrs: nounwind +; CHECK-LABEL: @_ZN5clang6format22BreakableStringLiteral11insertBreakEjjSt4pairImjERNS0_17WhitespaceManagerE + +; Load a value into R0 before saving the LR +; CHECK: lwz 0, {{[0-9]+([0-9]+)}} + +; Ensure the LR is saved using a different register +; CHECK: mflr {{[1-9]+}} + +; Ensure the LR is restored using a different register +; CHECK: mtlr {{[0-9]+}} +; CHECK: blr +define void @_ZN5clang6format22BreakableStringLiteral11insertBreakEjjSt4pairImjERNS0_17WhitespaceManagerE(%"class.clang::format::BreakableStringLiteral"* nocapture readonly %this, i32 zeroext %LineIndex, i32 zeroext %TailOffset, [2 x i64] %Split.coerce, %"class.clang::format::WhitespaceManager"* dereferenceable(1504) %Whitespaces) unnamed_addr #1 align 2 { +entry: + %Split.coerce.fca.0.extract = extractvalue [2 x i64] %Split.coerce, 0 + %Split.coerce.fca.1.extract = extractvalue [2 x i64] %Split.coerce, 1 + %StartColumn = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 1 + %0 = load i32, i32* %StartColumn, align 8, !tbaa !2 + %Prefix = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 2 + %Length.i.19 = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 2, i32 1 + %1 = load i64, i64* %Length.i.19, align 8, !tbaa !10 + %cmp.i = icmp eq i64 %1, 0 + br i1 %cmp.i, label %entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge, label %if.end.i.i + +entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge: ; preds = %entry + %agg.tmp7.sroa.0.0..sroa_cast.phi.trans.insert = bitcast %"class.llvm::StringRef"* %Prefix to i64* + %agg.tmp7.sroa.0.0.copyload.pre = load i64, i64* %agg.tmp7.sroa.0.0..sroa_cast.phi.trans.insert, align 8 + br label %_ZNK4llvm9StringRef10startswithES0_.exit + +if.end.i.i: ; preds = %entry + %Data.i.20 = getelementptr inbounds %"class.llvm::StringRef", %"class.llvm::StringRef"* %Prefix, i64 0, i32 0 + %2 = load i8*, i8** %Data.i.20, align 8, !tbaa !12 + %lhsc = load i8, i8* %2, align 1 + %phitmp.i = icmp eq i8 %lhsc, 64 + %3 = ptrtoint i8* %2 to i64 + br label %_ZNK4llvm9StringRef10startswithES0_.exit + +_ZNK4llvm9StringRef10startswithES0_.exit: ; preds = %entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge, %if.end.i.i + %agg.tmp7.sroa.0.0.copyload = phi i64 [ %agg.tmp7.sroa.0.0.copyload.pre, %entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge ], [ %3, %if.end.i.i ] + %4 = phi i1 [ false, %entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge ], [ %phitmp.i, %if.end.i.i ] + %dec = sext i1 %4 to i32 + %dec. = add i32 %dec, %0 + %Tok = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 0, i32 1 + %ref = load %"struct.clang::format::FormatToken"*, %"struct.clang::format::FormatToken"** %Tok, align 8, !tbaa !13 + %conv = zext i32 %TailOffset to i64 + %add = add i64 %Split.coerce.fca.0.extract, %conv + %add4 = add i64 %add, %1 + %conv5 = trunc i64 %add4 to i32 + %Split.sroa.2.8.extract.trunc = trunc i64 %Split.coerce.fca.1.extract to i32 + %agg.tmp6.sroa.0.0..sroa_idx13 = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 3 + %agg.tmp6.sroa.0.0..sroa_cast = bitcast %"class.llvm::StringRef"* %agg.tmp6.sroa.0.0..sroa_idx13 to i64* + %agg.tmp6.sroa.0.0.copyload = load i64, i64* %agg.tmp6.sroa.0.0..sroa_cast, align 8 + %agg.tmp6.sroa.2.0..sroa_idx14 = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 3, i32 1 + %agg.tmp6.sroa.2.0.copyload = load i64, i64* %agg.tmp6.sroa.2.0..sroa_idx14, align 8 + %InPPDirective = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 0, i32 3 + %5 = load i8, i8* %InPPDirective, align 4, !tbaa !34, !range !39 + %tobool = icmp ne i8 %5, 0 + %IndentLevel = getelementptr inbounds %"class.clang::format::BreakableStringLiteral", %"class.clang::format::BreakableStringLiteral"* %this, i64 0, i32 0, i32 0, i32 2 + %6 = load i32, i32* %IndentLevel, align 8, !tbaa !33 + %.fca.0.insert11 = insertvalue [2 x i64] undef, i64 %agg.tmp6.sroa.0.0.copyload, 0 + %.fca.1.insert12 = insertvalue [2 x i64] %.fca.0.insert11, i64 %agg.tmp6.sroa.2.0.copyload, 1 + %.fca.0.insert = insertvalue [2 x i64] undef, i64 %agg.tmp7.sroa.0.0.copyload, 0 + %.fca.1.insert = insertvalue [2 x i64] %.fca.0.insert, i64 %1, 1 + tail call void @_ZN5clang6format17WhitespaceManager24replaceWhitespaceInTokenERKNS0_11FormatTokenEjjN4llvm9StringRefES6_bjji(%"class.clang::format::WhitespaceManager"* nonnull %Whitespaces, %"struct.clang::format::FormatToken"* dereferenceable(272) %ref, i32 zeroext %conv5, i32 zeroext %Split.sroa.2.8.extract.trunc, [2 x i64] %.fca.1.insert12, [2 x i64] %.fca.1.insert, i1 zeroext %tobool, i32 zeroext 1, i32 zeroext %6, i32 signext %dec.) #9 + ret void +} + +; Function Attrs: nounwind argmemonly +declare void @llvm.lifetime.start(i64, i8* nocapture) #2 + +declare void @_ZN5clang6format17WhitespaceManager24replaceWhitespaceInTokenERKNS0_11FormatTokenEjjN4llvm9StringRefES6_bjji(%"class.clang::format::WhitespaceManager"*, %"struct.clang::format::FormatToken"* dereferenceable(272), i32 zeroext, i32 zeroext, [2 x i64], [2 x i64], i1 zeroext, i32 zeroext, i32 zeroext, i32 signext) #3 + +; Function Attrs: nounwind argmemonly +declare void @llvm.lifetime.end(i64, i8* nocapture) #2 + +attributes #9 = { nounwind } + +!llvm.module.flags = !{!0} +!llvm.ident = !{!1} + +!0 = !{i32 1, !"PIC Level", i32 2} +!1 = !{!"clang version 3.8.0 (trunk 248714) (llvm/trunk 248719)"} +!2 = !{!3, !4, i64 40} +!3 = !{!"_ZTSN5clang6format24BreakableSingleLineTokenE", !4, i64 40, !7, i64 48, !7, i64 64, !7, i64 80} +!4 = !{!"int", !5, i64 0} +!5 = !{!"omnipotent char", !6, i64 0} +!6 = !{!"Simple C/C++ TBAA"} +!7 = !{!"_ZTSN4llvm9StringRefE", !8, i64 0, !9, i64 8} +!8 = !{!"any pointer", !5, i64 0} +!9 = !{!"long", !5, i64 0} +!10 = !{!7, !9, i64 8} +!11 = !{!9, !9, i64 0} +!12 = !{!7, !8, i64 0} +!13 = !{!5, !5, i64 0} +!14 = !{!15, !4, i64 200} +!15 = !{!"_ZTSN5clang6format11FormatStyleE", !4, i64 0, !16, i64 4, !16, i64 5, !16, i64 6, !16, i64 7, !16, i64 8, !16, i64 9, !16, i64 10, !16, i64 11, !17, i64 12, !16, i64 16, !16, i64 17, !18, i64 20, !16, i64 24, !16, i64 25, !16, i64 26, !16, i64 27, !19, i64 28, !20, i64 32, !16, i64 36, !16, i64 37, !4, i64 40, !21, i64 48, !16, i64 56, !4, i64 60, !4, i64 64, !16, i64 68, !16, i64 69, !16, i64 70, !16, i64 71, !23, i64 72, !16, i64 96, !4, i64 100, !16, i64 104, !16, i64 105, !24, i64 108, !21, i64 112, !21, i64 120, !4, i64 128, !25, i64 132, !4, i64 136, !16, i64 140, !16, i64 141, !4, i64 144, !4, i64 148, !4, i64 152, !4, i64 156, !4, i64 160, !4, i64 164, !26, i64 168, !16, i64 172, !16, i64 173, !27, i64 176, !16, i64 180, !4, i64 184, !16, i64 188, !16, i64 189, !16, i64 190, !16, i64 191, !16, i64 192, !28, i64 196, !4, i64 200, !29, i64 204} +!16 = !{!"bool", !5, i64 0} +!17 = !{!"_ZTSN5clang6format11FormatStyle18ShortFunctionStyleE", !5, i64 0} +!18 = !{!"_ZTSN5clang6format11FormatStyle33DefinitionReturnTypeBreakingStyleE", !5, i64 0} +!19 = !{!"_ZTSN5clang6format11FormatStyle19BinaryOperatorStyleE", !5, i64 0} +!20 = !{!"_ZTSN5clang6format11FormatStyle18BraceBreakingStyleE", !5, i64 0} +!21 = !{!"_ZTSSs", !22, i64 0} +!22 = !{!"_ZTSNSs12_Alloc_hiderE", !8, i64 0} +!23 = !{!"_ZTSSt6vectorISsSaISsEE"} +!24 = !{!"_ZTSN5clang6format11FormatStyle12LanguageKindE", !5, i64 0} +!25 = !{!"_ZTSN5clang6format11FormatStyle24NamespaceIndentationKindE", !5, i64 0} +!26 = !{!"_ZTSN5clang6format11FormatStyle21PointerAlignmentStyleE", !5, i64 0} +!27 = !{!"_ZTSN5clang6format11FormatStyle24SpaceBeforeParensOptionsE", !5, i64 0} +!28 = !{!"_ZTSN5clang6format11FormatStyle16LanguageStandardE", !5, i64 0} +!29 = !{!"_ZTSN5clang6format11FormatStyle11UseTabStyleE", !5, i64 0} +!30 = !{!31, !32, i64 24} +!31 = !{!"_ZTSN5clang6format14BreakableTokenE", !5, i64 8, !4, i64 16, !16, i64 20, !32, i64 24, !5, i64 32} +!32 = !{!"_ZTSN5clang6format8encoding8EncodingE", !5, i64 0} +!33 = !{!31, !4, i64 16} +!34 = !{!31, !16, i64 20} +!35 = !{!36, !36, i64 0} +!36 = !{!"vtable pointer", !6, i64 0} +!37 = !{!38, !38, i64 0} +!38 = !{!"short", !5, i64 0} +!39 = !{i8 0, i8 2} +!40 = !{i64 0, i64 8, !41, i64 8, i64 8, !11} +!41 = !{!8, !8, i64 0} +!42 = !{!43, !8, i64 16} +!43 = !{!"_ZTSN4llvm15SmallVectorBaseE", !8, i64 0, !8, i64 8, !8, i64 16} +!44 = !{!43, !8, i64 8} +!45 = !{!43, !8, i64 0} +!46 = !{!4, !4, i64 0} +!47 = !{!48, !16, i64 500} +!48 = !{!"_ZTSN5clang6format21BreakableBlockCommentE", !49, i64 40, !51, i64 320, !53, i64 408, !4, i64 496, !16, i64 500, !7, i64 504} +!49 = !{!"_ZTSN4llvm11SmallVectorINS_9StringRefELj16EEE", !50, i64 40} +!50 = !{!"_ZTSN4llvm18SmallVectorStorageINS_9StringRefELj16EEE", !5, i64 0} +!51 = !{!"_ZTSN4llvm11SmallVectorIjLj16EEE", !52, i64 28} +!52 = !{!"_ZTSN4llvm18SmallVectorStorageIjLj16EEE", !5, i64 0} +!53 = !{!"_ZTSN4llvm11SmallVectorIiLj16EEE", !54, i64 28} +!54 = !{!"_ZTSN4llvm18SmallVectorStorageIiLj16EEE", !5, i64 0} +!55 = !{!48, !4, i64 496} diff --git a/test/CodeGen/PowerPC/aantidep-def-ec.mir b/test/CodeGen/PowerPC/aantidep-def-ec.mir new file mode 100644 index 000000000000..d1cb6782f038 --- /dev/null +++ b/test/CodeGen/PowerPC/aantidep-def-ec.mir @@ -0,0 +1,117 @@ +# RUN: llc -o - %s -start-after=if-converter | FileCheck %s + +--- | + target datalayout = "E-m:e-i64:64-n32:64" + target triple = "powerpc64-unknown-linux-gnu" + + %struct.rwlock_t.0.22.58.68.242.244 = type {} + + @tasklist_lock = external global %struct.rwlock_t.0.22.58.68.242.244, align 1 + + ; Function Attrs: nounwind + define void @mm_update_next_owner(i8** %p1, i32* %p2) #0 { + entry: + %0 = load i8*, i8** %p1, align 8 + br i1 undef, label %do.body.92, label %for.body.21 + + for.body.21: ; preds = %entry + unreachable + + do.body.92: ; preds = %entry + %usage = getelementptr inbounds i8, i8* %0, i64 -48 + %counter.i = bitcast i8* %usage to i32* + %call95 = tail call signext i32 bitcast (i32 (...)* @__raw_read_unlock to i32 (%struct.rwlock_t.0.22.58.68.242.244*)*)(%struct.rwlock_t.0.22.58.68.242.244* nonnull @tasklist_lock) #1 + store volatile i32 0, i32* %p2, align 4 + tail call void asm sideeffect "#compiler barrier", "~{memory}"() #1 + %1 = tail call i32 asm sideeffect "\0Alwsync \0A1:\09lwarx\09$0,0,$1\09\09# atomic_dec_return\0A\09addic\09$0,$0,-1\0A\09stwcx.\09$0,0,$1\0A\09bne-\091b\0Async \0A", "=&r,r,~{cc},~{xer},~{memory}"(i32* %counter.i) #1 + %cmp.i = icmp eq i32 %1, 0 + br i1 %cmp.i, label %if.then.i, label %put_task_struct.exit + + if.then.i: ; preds = %do.body.92 + unreachable + + put_task_struct.exit: ; preds = %do.body.92 + ret void + } + + declare signext i32 @__raw_read_unlock(...) + + attributes #0 = { nounwind "target-cpu"="pwr7" } + attributes #1 = { nounwind } + +... +--- +name: mm_update_next_owner +alignment: 4 +exposesReturnsTwice: false +hasInlineAsm: true +isSSA: false +tracksRegLiveness: true +tracksSubRegLiveness: false +liveins: + - { reg: '%x3' } + - { reg: '%x4' } +calleeSavedRegisters: [ '%cr2', '%cr3', '%cr4', '%f14', '%f15', '%f16', + '%f17', '%f18', '%f19', '%f20', '%f21', '%f22', + '%f23', '%f24', '%f25', '%f26', '%f27', '%f28', + '%f29', '%f30', '%f31', '%r14', '%r15', '%r16', + '%r17', '%r18', '%r19', '%r20', '%r21', '%r22', + '%r23', '%r24', '%r25', '%r26', '%r27', '%r28', + '%r29', '%r30', '%r31', '%v20', '%v21', '%v22', + '%v23', '%v24', '%v25', '%v26', '%v27', '%v28', + '%v29', '%v30', '%v31', '%vf20', '%vf21', '%vf22', + '%vf23', '%vf24', '%vf25', '%vf26', '%vf27', '%vf28', + '%vf29', '%vf30', '%vf31', '%x14', '%x15', '%x16', + '%x17', '%x18', '%x19', '%x20', '%x21', '%x22', + '%x23', '%x24', '%x25', '%x26', '%x27', '%x28', + '%x29', '%x30', '%x31', '%cr2eq', '%cr3eq', '%cr4eq', + '%cr2gt', '%cr3gt', '%cr4gt', '%cr2lt', '%cr3lt', + '%cr4lt', '%cr2un', '%cr3un', '%cr4un' ] +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 144 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: true + hasCalls: true + maxCallFrameSize: 112 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +fixedStack: + - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%x30' } + - { id: 1, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '%x29' } +body: | + bb.0.entry: + liveins: %x3, %x4, %x29, %x30, %x29, %x30 + + %x0 = MFLR8 implicit %lr8 + STD %x0, 16, %x1 + %x1 = STDU %x1, -144, %x1 + STD killed %x29, 120, %x1 :: (store 8 into %fixed-stack.1) + STD killed %x30, 128, %x1 :: (store 8 into %fixed-stack.0, align 16) + %x30 = OR8 %x4, %x4 + %x3 = LD 0, killed %x3 :: (load 8 from %ir.p1) + %x29 = ADDI8 killed %x3, -48 + %x3 = ADDIStocHA %x2, @tasklist_lock + %x3 = LDtocL @tasklist_lock, killed %x3, implicit %x2 :: (load 8 from got) + BL8_NOP @__raw_read_unlock, csr_svr464_altivec, implicit-def %lr8, implicit %rm, implicit %x3, implicit %x2, implicit-def %r1, implicit-def dead %x3 + %r3 = LI 0 + STW killed %r3, 0, killed %x30 :: (volatile store 4 into %ir.p2) + INLINEASM $"#compiler barrier", 25 + INLINEASM $"\0Alwsync \0A1:\09lwarx\09$0,0,$1\09\09# atomic_dec_return\0A\09addic\09$0,$0,-1\0A\09stwcx.\09$0,0,$1\0A\09bne-\091b\0Async \0A", 25, 131083, def early-clobber %r3, 851977, killed %x29, 12, implicit-def dead early-clobber %cr0 + ; CHECK-LABEL: @mm_update_next_owner + ; CHECK-NOT: lwarx 29, 0, 29 + ; CHECK-NOT: stwcx. 29, 0, 29 + %cr0 = CMPLWI killed %r3, 0 + %x30 = LD 128, %x1 :: (load 8 from %fixed-stack.0, align 16) + %x29 = LD 120, %x1 :: (load 8 from %fixed-stack.1) + %x1 = ADDI8 %x1, 144 + %x0 = LD 16, %x1 + MTLR8 %x0, implicit-def %lr8 + BLR8 implicit %lr8, implicit %rm + +... diff --git a/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll b/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll new file mode 100644 index 000000000000..f0c0deacf4dd --- /dev/null +++ b/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll @@ -0,0 +1,305 @@ +; RUN: llc -O2 < %s | FileCheck %s +; ModuleID = 'bugpoint-reduced-simplified.bc' +target datalayout = "e-m:e-i64:64-n32:64" +target triple = "powerpc64le-grtev4-linux-gnu" + +; Function Attrs: nounwind +define void @_ZN10SubProcess19ScrubbedForkAndExecEiPiS0_PNS_7ResultsE() #0 align 2 { +; CHECK: lis 3, 1234 +; CHECK-NOT: li 3 +; CHECK-NOT: ori 3 +; CHECK-NOT: addi 3 +; CHECK-NOT: addis 3 +; CHECK-NOT: lis 3 +; CHECK: sc + br i1 undef, label %1, label %2 + +;