From 59d6cff90eecf31cb3dd860c4e786674cfdd42eb Mon Sep 17 00:00:00 2001
From: Dimitry Andric <dim@FreeBSD.org>
Date: Mon, 10 Jun 2013 20:36:52 +0000
Subject: Vendor import of llvm tags/RELEASE_33/final r183502 (effectively, 3.3
 release): http://llvm.org/svn/llvm-project/llvm/tags/RELEASE_33/final@183502

---
 test/CodeGen/SystemZ/asm-09.ll | 83 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)
 create mode 100644 test/CodeGen/SystemZ/asm-09.ll

(limited to 'test/CodeGen/SystemZ/asm-09.ll')

diff --git a/test/CodeGen/SystemZ/asm-09.ll b/test/CodeGen/SystemZ/asm-09.ll
new file mode 100644
index 000000000000..1541170924b7
--- /dev/null
+++ b/test/CodeGen/SystemZ/asm-09.ll
@@ -0,0 +1,83 @@
+; Test matching operands with the GPR constraint "r".
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+
+define void @f1(i32 *%dst) {
+; CHECK: f1:
+; CHECK: lhi %r0, 100
+; CHECK: blah %r0
+; CHECK: st %r0, 0(%r2)
+; CHECK: br %r14
+  %val = call i32 asm "blah $0", "=r,0" (i8 100)
+  store i32 %val, i32 *%dst
+  ret void
+}
+
+define void @f2(i32 *%dst) {
+; CHECK: f2:
+; CHECK: lhi %r0, 101
+; CHECK: blah %r0
+; CHECK: st %r0, 0(%r2)
+; CHECK: br %r14
+  %val = call i32 asm "blah $0", "=r,0" (i16 101)
+  store i32 %val, i32 *%dst
+  ret void
+}
+
+define void @f3(i32 *%dst) {
+; CHECK: f3:
+; CHECK: lhi %r0, 102
+; CHECK: blah %r0
+; CHECK: st %r0, 0(%r2)
+; CHECK: br %r14
+  %val = call i32 asm "blah $0", "=r,0" (i32 102)
+  store i32 %val, i32 *%dst
+  ret void
+}
+
+; FIXME: this uses "lhi %r0, 103", but should use "lghi %r0, 103".
+define void @f4(i32 *%dst) {
+; CHECK: f4:
+; CHECK: blah %r0
+; CHECK: st %r0, 0(%r2)
+; CHECK: br %r14
+  %val = call i32 asm "blah $0", "=r,0" (i64 103)
+  store i32 %val, i32 *%dst
+  ret void
+}
+
+define i64 @f5() {
+; CHECK: f5:
+; CHECK: lghi %r2, 104
+; CHECK: blah %r2
+; CHECK: br %r14
+  %val = call i64 asm "blah $0", "=r,0" (i8 104)
+  ret i64 %val
+}
+
+define i64 @f6() {
+; CHECK: f6:
+; CHECK: lghi %r2, 105
+; CHECK: blah %r2
+; CHECK: br %r14
+  %val = call i64 asm "blah $0", "=r,0" (i16 105)
+  ret i64 %val
+}
+
+define i64 @f7() {
+; CHECK: f7:
+; CHECK: lghi %r2, 106
+; CHECK: blah %r2
+; CHECK: br %r14
+  %val = call i64 asm "blah $0", "=r,0" (i32 106)
+  ret i64 %val
+}
+
+define i64 @f8() {
+; CHECK: f8:
+; CHECK: lghi %r2, 107
+; CHECK: blah %r2
+; CHECK: br %r14
+  %val = call i64 asm "blah $0", "=r,0" (i64 107)
+  ret i64 %val
+}
-- 
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