From 6b943ff3a3f8617113ecbf611cf0f8957e4e19d2 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Mon, 2 May 2011 19:34:44 +0000 Subject: Vendor import of llvm trunk r130700: http://llvm.org/svn/llvm-project/llvm/trunk@130700 --- test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll | 7 +- test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll | 4 +- test/CodeGen/X86/2007-05-05-Personality.ll | 5 +- test/CodeGen/X86/2007-07-03-GR64ToVR64.ll | 8 +- test/CodeGen/X86/2007-07-18-Vector-Extract.ll | 6 +- test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll | 4 +- test/CodeGen/X86/2007-09-27-LDIntrinsics.ll | 4 +- test/CodeGen/X86/2008-02-22-ReMatBug.ll | 2 +- test/CodeGen/X86/2008-03-18-CoalescerBug.ll | 4 +- test/CodeGen/X86/2008-04-02-unnamedEH.ll | 2 +- test/CodeGen/X86/2008-04-16-ReMatBug.ll | 2 +- test/CodeGen/X86/2008-07-11-SpillerBug.ll | 1 - test/CodeGen/X86/2008-07-19-movups-spills.ll | 6 +- test/CodeGen/X86/2008-08-05-SpillerBug.ll | 44 - test/CodeGen/X86/2008-09-18-inline-asm-2.ll | 6 +- test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll | 6 +- test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll | 2 +- test/CodeGen/X86/2009-03-11-CoalescerBug.ll | 85 - test/CodeGen/X86/2009-03-16-SpillerBug.ll | 2 +- test/CodeGen/X86/2009-04-20-LinearScanOpt.ll | 2 +- test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll | 2 +- test/CodeGen/X86/2009-04-24.ll | 2 +- test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll | 2 +- test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll | 5 +- .../X86/2010-05-03-CoalescerSubRegClobber.ll | 4 +- test/CodeGen/X86/2010-05-25-DotDebugLoc.ll | 1 + test/CodeGen/X86/2010-05-26-DotDebugLoc.ll | 18 +- test/CodeGen/X86/2010-05-28-Crash.ll | 1 + test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll | 3 +- test/CodeGen/X86/2010-08-04-StackVariable.ll | 4 +- test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll | 10 +- test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll | 2 +- test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll | 1 + test/CodeGen/X86/2011-02-27-Fpextend.ll | 7 + test/CodeGen/X86/2011-03-02-DAGCombiner.ll | 51 + test/CodeGen/X86/2011-03-08-Sched-crash.ll | 56 + test/CodeGen/X86/2011-03-09-Physreg-Coalescing.ll | 22 + test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll | 10 + test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll | 65 + test/CodeGen/X86/3dnow-intrinsics.ll | 297 ++ test/CodeGen/X86/MachineSink-PHIUse.ll | 2 +- test/CodeGen/X86/SIMD/dg.exp | 5 + test/CodeGen/X86/SIMD/notvunpcklpd.ll | 20 + test/CodeGen/X86/SIMD/notvunpcklps.ll | 20 + test/CodeGen/X86/SIMD/vunpcklpd.ll | 20 + test/CodeGen/X86/SIMD/vunpcklps.ll | 20 + test/CodeGen/X86/abi-isel.ll | 5575 ++++++++++---------- test/CodeGen/X86/add.ll | 15 + test/CodeGen/X86/adde-carry.ll | 26 + test/CodeGen/X86/aliases.ll | 2 - test/CodeGen/X86/alignment.ll | 6 +- test/CodeGen/X86/apm.ll | 11 +- test/CodeGen/X86/avoid-lea-scale2.ll | 4 +- test/CodeGen/X86/avx-intrinsics-x86.ll | 4 +- test/CodeGen/X86/bool-zext.ll | 35 + test/CodeGen/X86/break-anti-dependencies.ll | 3 +- test/CodeGen/X86/byval.ll | 3 +- test/CodeGen/X86/byval2.ll | 27 +- test/CodeGen/X86/byval3.ll | 27 +- test/CodeGen/X86/byval4.ll | 27 +- test/CodeGen/X86/byval5.ll | 27 +- test/CodeGen/X86/call-push.ll | 16 + test/CodeGen/X86/coalesce-esp.ll | 2 +- test/CodeGen/X86/coalescer-commute2.ll | 9 +- test/CodeGen/X86/coalescer-cross.ll | 6 +- test/CodeGen/X86/commute-two-addr.ll | 3 +- test/CodeGen/X86/constant-pool-remat-0.ll | 17 +- test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll | 10 +- test/CodeGen/X86/crash.ll | 18 +- test/CodeGen/X86/dbg-declare-arg.ll | 123 + test/CodeGen/X86/dbg-file-name.ll | 19 + test/CodeGen/X86/dbg-merge-loc-entry.ll | 3 +- test/CodeGen/X86/dbg-value-inlined-parameter.ll | 1 + test/CodeGen/X86/dbg-value-location.ll | 1 + test/CodeGen/X86/dbg-value-range.ll | 17 +- test/CodeGen/X86/divide-by-constant.ll | 11 + test/CodeGen/X86/dyn-stackalloc.ll | 9 +- test/CodeGen/X86/fast-isel-gep.ll | 19 + test/CodeGen/X86/fast-isel-i1.ll | 39 +- test/CodeGen/X86/fast-isel-shift-imm.ll | 8 - test/CodeGen/X86/fast-isel-x86-64.ll | 262 + test/CodeGen/X86/fast-isel-x86.ll | 17 +- test/CodeGen/X86/fast-isel.ll | 11 + test/CodeGen/X86/fold-mul-lohi.ll | 5 +- test/CodeGen/X86/fold-pcmpeqd-0.ll | 16 +- test/CodeGen/X86/fold-pcmpeqd-2.ll | 17 +- test/CodeGen/X86/fold-zext-trunc.ll | 23 + test/CodeGen/X86/fp-stack-compare.ll | 14 +- test/CodeGen/X86/fp-trunc.ll | 35 + test/CodeGen/X86/global-sections-tls.ll | 2 +- test/CodeGen/X86/global-sections.ll | 6 +- test/CodeGen/X86/h-register-store.ll | 32 +- test/CodeGen/X86/h-registers-0.ll | 26 +- test/CodeGen/X86/h-registers-1.ll | 2 +- test/CodeGen/X86/hidden-vis-pic.ll | 2 +- test/CodeGen/X86/i64-mem-copy.ll | 8 +- test/CodeGen/X86/iabs.ll | 11 +- test/CodeGen/X86/isel-sink3.ll | 6 +- test/CodeGen/X86/lea-3.ll | 17 +- test/CodeGen/X86/lock-inst-encoding.ll | 5 +- test/CodeGen/X86/loop-strength-reduce4.ll | 6 +- test/CodeGen/X86/lsr-interesting-step.ll | 4 +- test/CodeGen/X86/lsr-quadratic-expand.ll | 22 + test/CodeGen/X86/lsr-redundant-addressing.ll | 45 + test/CodeGen/X86/lsr-reuse-trunc.ll | 5 +- test/CodeGen/X86/lsr-reuse.ll | 1 + test/CodeGen/X86/machine-cse.ll | 4 +- test/CodeGen/X86/mcinst-lowering-cmp0.ll | 68 - test/CodeGen/X86/mmx-copy-gprs.ll | 10 +- test/CodeGen/X86/narrow-shl-cst.ll | 101 + test/CodeGen/X86/no-cfi.ll | 38 + test/CodeGen/X86/optimize-max-3.ll | 4 +- test/CodeGen/X86/or-address.ll | 8 +- test/CodeGen/X86/peep-vector-extract-concat.ll | 7 +- test/CodeGen/X86/personality.ll | 22 +- test/CodeGen/X86/phi-bit-propagation.ll | 55 + test/CodeGen/X86/phi-constants.ll | 35 - test/CodeGen/X86/pic.ll | 2 +- test/CodeGen/X86/pmulld.ll | 12 +- test/CodeGen/X86/postra-licm.ll | 9 +- test/CodeGen/X86/pr2659.ll | 3 +- test/CodeGen/X86/pr3366.ll | 2 +- test/CodeGen/X86/pr3495-2.ll | 2 +- test/CodeGen/X86/pr3495.ll | 6 +- test/CodeGen/X86/pr9743.ll | 17 + test/CodeGen/X86/pre-split1.ll | 2 +- test/CodeGen/X86/pre-split10.ll | 2 +- test/CodeGen/X86/pre-split11.ll | 2 +- test/CodeGen/X86/pre-split2.ll | 2 +- test/CodeGen/X86/pre-split3.ll | 2 +- test/CodeGen/X86/pre-split4.ll | 2 +- test/CodeGen/X86/pre-split5.ll | 2 +- test/CodeGen/X86/pre-split6.ll | 2 +- test/CodeGen/X86/pre-split7.ll | 2 +- test/CodeGen/X86/pre-split8.ll | 2 +- test/CodeGen/X86/pre-split9.ll | 2 +- test/CodeGen/X86/remat-scalar-zero.ll | 1 + test/CodeGen/X86/scalar-min-max-fill-operand.ll | 13 +- test/CodeGen/X86/sext-i1.ll | 4 +- test/CodeGen/X86/shrink-compare.ll | 36 + test/CodeGen/X86/sse-align-0.ll | 3 +- test/CodeGen/X86/sse-align-3.ll | 7 +- test/CodeGen/X86/sse-align-7.ll | 4 +- test/CodeGen/X86/sse-commute.ll | 2 +- test/CodeGen/X86/sse2.ll | 6 +- test/CodeGen/X86/sse3.ll | 12 +- test/CodeGen/X86/sse_reload_fold.ll | 5 +- test/CodeGen/X86/stdarg.ll | 3 +- test/CodeGen/X86/stride-nine-with-base-reg.ll | 5 +- test/CodeGen/X86/stride-reuse.ll | 5 +- test/CodeGen/X86/sub-with-overflow.ll | 22 +- test/CodeGen/X86/tail-opts.ll | 30 +- test/CodeGen/X86/tailcall-returndup-void.ll | 37 + test/CodeGen/X86/tailcallbyval64.ll | 25 +- test/CodeGen/X86/tailcallstack64.ll | 12 +- test/CodeGen/X86/test-nofold.ll | 8 +- test/CodeGen/X86/twoaddr-lea.ll | 11 + test/CodeGen/X86/umulo-64.ll | 28 - test/CodeGen/X86/unaligned-load.ll | 4 +- test/CodeGen/X86/unknown-location.ll | 13 +- test/CodeGen/X86/unreachable-stack-protector.ll | 19 + test/CodeGen/X86/v2f32.ll | 67 +- test/CodeGen/X86/vec_cast.ll | 4 +- test/CodeGen/X86/vec_set-8.ll | 7 +- test/CodeGen/X86/vec_shuffle-16.ll | 23 +- test/CodeGen/X86/vec_shuffle-17.ll | 7 +- test/CodeGen/X86/vec_uint_to_fp.ll | 11 + test/CodeGen/X86/visibility.ll | 7 +- test/CodeGen/X86/widen_load-0.ll | 8 +- test/CodeGen/X86/win64_alloca_dynalloca.ll | 74 + test/CodeGen/X86/win64_vararg.ll | 33 + test/CodeGen/X86/win_chkstk.ll | 3 +- test/CodeGen/X86/x86-64-malloc.ll | 4 +- test/CodeGen/X86/zext-extract_subreg.ll | 1 + test/CodeGen/X86/zext-sext.ll | 1 + 175 files changed, 5216 insertions(+), 3351 deletions(-) delete mode 100644 test/CodeGen/X86/2008-08-05-SpillerBug.ll delete mode 100644 test/CodeGen/X86/2009-03-11-CoalescerBug.ll create mode 100644 test/CodeGen/X86/2011-02-27-Fpextend.ll create mode 100644 test/CodeGen/X86/2011-03-02-DAGCombiner.ll create mode 100644 test/CodeGen/X86/2011-03-08-Sched-crash.ll create mode 100644 test/CodeGen/X86/2011-03-09-Physreg-Coalescing.ll create mode 100644 test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll create mode 100644 test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll create mode 100644 test/CodeGen/X86/3dnow-intrinsics.ll create mode 100644 test/CodeGen/X86/SIMD/dg.exp create mode 100644 test/CodeGen/X86/SIMD/notvunpcklpd.ll create mode 100644 test/CodeGen/X86/SIMD/notvunpcklps.ll create mode 100644 test/CodeGen/X86/SIMD/vunpcklpd.ll create mode 100644 test/CodeGen/X86/SIMD/vunpcklps.ll create mode 100644 test/CodeGen/X86/adde-carry.ll create mode 100644 test/CodeGen/X86/bool-zext.ll create mode 100644 test/CodeGen/X86/dbg-declare-arg.ll create mode 100644 test/CodeGen/X86/dbg-file-name.ll delete mode 100644 test/CodeGen/X86/fast-isel-shift-imm.ll create mode 100644 test/CodeGen/X86/fast-isel-x86-64.ll create mode 100644 test/CodeGen/X86/fold-zext-trunc.ll create mode 100644 test/CodeGen/X86/fp-trunc.ll create mode 100644 test/CodeGen/X86/lsr-quadratic-expand.ll create mode 100644 test/CodeGen/X86/lsr-redundant-addressing.ll delete mode 100644 test/CodeGen/X86/mcinst-lowering-cmp0.ll create mode 100644 test/CodeGen/X86/narrow-shl-cst.ll create mode 100644 test/CodeGen/X86/no-cfi.ll create mode 100644 test/CodeGen/X86/phi-bit-propagation.ll delete mode 100644 test/CodeGen/X86/phi-constants.ll create mode 100644 test/CodeGen/X86/pr9743.ll create mode 100644 test/CodeGen/X86/shrink-compare.ll create mode 100644 test/CodeGen/X86/tailcall-returndup-void.ll delete mode 100644 test/CodeGen/X86/umulo-64.ll create mode 100644 test/CodeGen/X86/unreachable-stack-protector.ll create mode 100644 test/CodeGen/X86/vec_uint_to_fp.ll create mode 100644 test/CodeGen/X86/win64_alloca_dynalloca.ll (limited to 'test/CodeGen/X86') diff --git a/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll b/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll index de226a140ad1..3458550aa103 100644 --- a/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll +++ b/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll @@ -1,5 +1,8 @@ -; RUN: llc %s -o - -march=x86-64 | grep {(%rdi,%rax,8)} -; RUN: llc %s -o - -march=x86-64 | not grep {addq.*8} +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s +; CHECK-NOT: {{addq.*8}} +; CHECK: ({{%rdi|%rcx}},%rax,8) +; CHECK-NOT: {{addq.*8}} define void @foo(double* %y) nounwind { entry: diff --git a/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll index a662dd58df57..11c0bf957983 100644 --- a/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll +++ b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll @@ -8,8 +8,8 @@ entry: bb26: ; preds = %bb26, %entry -; CHECK: addl %e -; CHECK: adcl %e +; CHECK: addl +; CHECK: adcl %i.037.0 = phi i32 [ 0, %entry ], [ %tmp25, %bb26 ] ; [#uses=3] %sum.035.0 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ] ; <<1 x i64>> [#uses=1] diff --git a/test/CodeGen/X86/2007-05-05-Personality.ll b/test/CodeGen/X86/2007-05-05-Personality.ll index a9b17d3b8f36..0f49d2e10cb9 100644 --- a/test/CodeGen/X86/2007-05-05-Personality.ll +++ b/test/CodeGen/X86/2007-05-05-Personality.ll @@ -1,4 +1,7 @@ -; RUN: llc < %s -mtriple=i686-pc-linux-gnu -o - | grep zPL +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -o - | FileCheck %s + +; CHECK: .cfi_personality 0, __gnat_eh_personality +; CHECK: .cfi_lsda 0, .Lexception0 @error = external global i8 ; [#uses=2] diff --git a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll index 1c5e6766fd6e..187c3e4221b5 100644 --- a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll +++ b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rsi, %mm0} -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rdi, %mm1} -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {paddusw %mm0, %mm1} +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | FileCheck %s + +; CHECK: movd %rsi, [[MM0:%mm[0-9]+]] +; CHECK: movd %rdi, [[MM1:%mm[0-9]+]] +; CHECK: paddusw [[MM0]], [[MM1]] @R = external global x86_mmx ; [#uses=1] diff --git a/test/CodeGen/X86/2007-07-18-Vector-Extract.ll b/test/CodeGen/X86/2007-07-18-Vector-Extract.ll index 8625b2771738..6288c4a892c3 100644 --- a/test/CodeGen/X86/2007-07-18-Vector-Extract.ll +++ b/test/CodeGen/X86/2007-07-18-Vector-Extract.ll @@ -1,5 +1,7 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse | grep {movq (%rdi), %rax} -; RUN: llc < %s -march=x86-64 -mattr=+sse | grep {movq 8(%rdi), %rax} +; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse | FileCheck %s +; CHECK: movq ([[A0:%rdi|%rcx]]), %rax +; CHECK: movq 8([[A0]]), %rax define i64 @foo_0(<2 x i64>* %val) { entry: %val12 = getelementptr <2 x i64>* %val, i32 0, i32 0 ; [#uses=1] diff --git a/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll b/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll index c3403a0b4eeb..1e43272a84e8 100644 --- a/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll +++ b/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | grep {isNullOrNil].eh"} | count 2 +; RUN: llc < %s -disable-cfi -march=x86 -mtriple=i686-apple-darwin | grep {isNullOrNil].eh"} | FileCheck %s + +; CHECK: "_-[NSString(local) isNullOrNil].eh": %struct.NSString = type { } %struct._objc__method_prototype_list = type opaque diff --git a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll index 4d6971586c2a..b4a986ff77f9 100644 --- a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll +++ b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll @@ -22,8 +22,8 @@ entry: ; CHECK: bar: ; CHECK: fldt 4(%esp) ; CHECK-NEXT: fld %st(0) -; CHECK-NEXT: fmul %st(1) -; CHECK-NEXT: fmulp %st(1) +; CHECK-NEXT: fmul %st(1), %st(0) +; CHECK-NEXT: fmulp ; CHECK-NEXT: ret } diff --git a/test/CodeGen/X86/2008-02-22-ReMatBug.ll b/test/CodeGen/X86/2008-02-22-ReMatBug.ll index a91ac27f98dd..8f4d353f28d3 100644 --- a/test/CodeGen/X86/2008-02-22-ReMatBug.ll +++ b/test/CodeGen/X86/2008-02-22-ReMatBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -stats |& grep {Number of re-materialization} | grep 2 +; RUN: llc < %s -march=x86 -stats -regalloc=linearscan |& grep {Number of re-materialization} | grep 2 ; rdar://5761454 %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } diff --git a/test/CodeGen/X86/2008-03-18-CoalescerBug.ll b/test/CodeGen/X86/2008-03-18-CoalescerBug.ll index 3ae502619725..33d658ca01f9 100644 --- a/test/CodeGen/X86/2008-03-18-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-03-18-CoalescerBug.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep movss | count 1 -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -stats |& grep {Number of re-materialization} | grep 1 +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -regalloc=linearscan | grep movss | count 1 +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -regalloc=linearscan -stats |& grep {Number of re-materialization} | grep 1 %struct..0objc_object = type opaque %struct.OhBoy = type { } diff --git a/test/CodeGen/X86/2008-04-02-unnamedEH.ll b/test/CodeGen/X86/2008-04-02-unnamedEH.ll index 27bbbaa2962d..ab8ec801b049 100644 --- a/test/CodeGen/X86/2008-04-02-unnamedEH.ll +++ b/test/CodeGen/X86/2008-04-02-unnamedEH.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc < %s -disable-cfi | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" diff --git a/test/CodeGen/X86/2008-04-16-ReMatBug.ll b/test/CodeGen/X86/2008-04-16-ReMatBug.ll index 6e8891bfd5b8..bfe8ef53f565 100644 --- a/test/CodeGen/X86/2008-04-16-ReMatBug.ll +++ b/test/CodeGen/X86/2008-04-16-ReMatBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin | grep movw | not grep {, %e} +; RUN: llc < %s -mtriple=i386-apple-darwin -disable-cgp-branch-opts | grep movw | not grep {, %e} %struct.DBC_t = type { i32, i8*, i16, %struct.DBC_t*, i8*, i8*, i8*, i8*, i8*, %struct.DBC_t*, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32*, i8, i16, %struct.DRVOPT*, i16 } %struct.DRVOPT = type { i16, i32, i8, %struct.DRVOPT* } diff --git a/test/CodeGen/X86/2008-07-11-SpillerBug.ll b/test/CodeGen/X86/2008-07-11-SpillerBug.ll index d0023b28c6dd..dee7415b0836 100644 --- a/test/CodeGen/X86/2008-07-11-SpillerBug.ll +++ b/test/CodeGen/X86/2008-07-11-SpillerBug.ll @@ -4,7 +4,6 @@ ; CHECK: andl $65534, % ; CHECK-NEXT: movl % ; CHECK-NEXT: movzwl -; CHECK-NEXT: movl $17 @g_5 = external global i16 ; [#uses=2] @g_107 = external global i16 ; [#uses=1] diff --git a/test/CodeGen/X86/2008-07-19-movups-spills.ll b/test/CodeGen/X86/2008-07-19-movups-spills.ll index cf04dcf0f18c..368af6d8abde 100644 --- a/test/CodeGen/X86/2008-07-19-movups-spills.ll +++ b/test/CodeGen/X86/2008-07-19-movups-spills.ll @@ -1,7 +1,9 @@ -; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movaps | count 75 -; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 75 +; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movups | count 33 +; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movups | count 33 ; PR2539 ; PR8969 - make 32-bit linux have a 16-byte aligned stack +; Verify that movups is still generated with an aligned stack for the globals +; that must be accessed unaligned external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2] external global <4 x float>, align 1 ; <<4 x float>*>:1 [#uses=1] diff --git a/test/CodeGen/X86/2008-08-05-SpillerBug.ll b/test/CodeGen/X86/2008-08-05-SpillerBug.ll deleted file mode 100644 index d9d95b595bee..000000000000 --- a/test/CodeGen/X86/2008-08-05-SpillerBug.ll +++ /dev/null @@ -1,44 +0,0 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah -disable-fp-elim -stats |& grep asm-printer | grep 55 -; PR2568 - -@g_3 = external global i16 ; [#uses=1] -@g_5 = external global i32 ; [#uses=3] - -declare i32 @func_15(i16 signext , i16 signext , i32) nounwind - -define void @func_9_entry_2E_ce(i8 %p_11) nounwind { -newFuncRoot: - br label %entry.ce - -entry.ce.ret.exitStub: ; preds = %entry.ce - ret void - -entry.ce: ; preds = %newFuncRoot - load i16* @g_3, align 2 ; :0 [#uses=1] - icmp sgt i16 %0, 0 ; :1 [#uses=1] - zext i1 %1 to i32 ; :2 [#uses=1] - load i32* @g_5, align 4 ; :3 [#uses=4] - icmp ugt i32 %2, %3 ; :4 [#uses=1] - zext i1 %4 to i32 ; :5 [#uses=1] - icmp eq i32 %3, 0 ; :6 [#uses=1] - %.0 = select i1 %6, i32 1, i32 %3 ; [#uses=1] - urem i32 1, %.0 ; :7 [#uses=2] - sext i8 %p_11 to i16 ; :8 [#uses=1] - trunc i32 %3 to i16 ; :9 [#uses=1] - tail call i32 @func_15( i16 signext %8, i16 signext %9, i32 1 ) nounwind ; :10 [#uses=0] - load i32* @g_5, align 4 ; :11 [#uses=1] - trunc i32 %11 to i16 ; :12 [#uses=1] - tail call i32 @func_15( i16 signext %12, i16 signext 1, i32 %7 ) nounwind ; :13 [#uses=0] - sext i8 %p_11 to i32 ; :14 [#uses=1] - %p_11.lobit = lshr i8 %p_11, 7 ; [#uses=1] - %tmp = zext i8 %p_11.lobit to i32 ; [#uses=1] - %tmp.not = xor i32 %tmp, 1 ; [#uses=1] - %.015 = ashr i32 %14, %tmp.not ; [#uses=2] - icmp eq i32 %.015, 0 ; :15 [#uses=1] - %.016 = select i1 %15, i32 1, i32 %.015 ; [#uses=1] - udiv i32 %7, %.016 ; :16 [#uses=1] - icmp ult i32 %5, %16 ; :17 [#uses=1] - zext i1 %17 to i32 ; :18 [#uses=1] - store i32 %18, i32* @g_5, align 4 - br label %entry.ce.ret.exitStub -} diff --git a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll index eadfda0394dd..947a1f17172c 100644 --- a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll +++ b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll @@ -1,5 +1,7 @@ -; RUN: llc < %s -march=x86 | grep "#%ebp %edi %ebx 8(%esi) %eax %dl" -; RUN: llc < %s -march=x86 -regalloc=fast | grep "#%ebx %esi %edi 8(%ebp) %eax %dl" +; RUN: llc < %s -march=x86 -regalloc=linearscan | grep "#%ebp %edi %ebx 8(%esi) %eax %dl" +; RUN: llc < %s -march=x86 -regalloc=fast | grep "#%ebx %esi %edi 8(%ebp) %eax %dl" +; RUN: llc < %s -march=x86 -regalloc=basic | grep "#%ebp %esi %edx 8(%edi) %eax %bl" +; RUN: llc < %s -march=x86 -regalloc=greedy | grep "#%edx %edi %ebp 8(%esi) %eax %bl" ; The 1st, 2nd, 3rd and 5th registers above must all be different. The registers ; referenced in the 4th and 6th operands must not be the same as the 1st or 5th diff --git a/test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll b/test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll index e97b63db14d9..2e278118b7ad 100644 --- a/test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll +++ b/test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll @@ -1,7 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu | grep ^.L_Z1fv.eh -; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu | grep ^.L_Z1fv.eh -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin9 | grep ^__Z1fv.eh -; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 | grep ^__Z1fv.eh +; RUN: llc < %s -disable-cfi -march=x86-64 -mtriple=x86_64-apple-darwin9 | grep ^__Z1fv.eh +; RUN: llc < %s -disable-cfi -march=x86 -mtriple=i386-apple-darwin9 | grep ^__Z1fv.eh define void @_Z1fv() { entry: diff --git a/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll b/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll index 58a7f9fb7593..aba4bfcbf52f 100644 --- a/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll +++ b/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8 -pre-alloc-split +; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8 -pre-alloc-split -regalloc=linearscan define i32 @main() nounwind { bb4.i.thread: diff --git a/test/CodeGen/X86/2009-03-11-CoalescerBug.ll b/test/CodeGen/X86/2009-03-11-CoalescerBug.ll deleted file mode 100644 index d5ba93e10495..000000000000 --- a/test/CodeGen/X86/2009-03-11-CoalescerBug.ll +++ /dev/null @@ -1,85 +0,0 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin9 -stats |& grep regcoalescing | grep commuting - -@lookupTable5B = external global [64 x i32], align 32 ; <[64 x i32]*> [#uses=1] -@lookupTable3B = external global [16 x i32], align 32 ; <[16 x i32]*> [#uses=1] -@disparity0 = external global i32 ; [#uses=5] -@disparity1 = external global i32 ; [#uses=3] - -define i32 @calc(i32 %theWord, i32 %k) nounwind { -entry: - %0 = lshr i32 %theWord, 3 ; [#uses=1] - %1 = and i32 %0, 31 ; [#uses=1] - %2 = shl i32 %k, 5 ; [#uses=1] - %3 = or i32 %1, %2 ; [#uses=1] - %4 = and i32 %theWord, 7 ; [#uses=1] - %5 = shl i32 %k, 3 ; [#uses=1] - %6 = or i32 %5, %4 ; [#uses=1] - %7 = getelementptr [64 x i32]* @lookupTable5B, i32 0, i32 %3 ; [#uses=1] - %8 = load i32* %7, align 4 ; [#uses=5] - %9 = getelementptr [16 x i32]* @lookupTable3B, i32 0, i32 %6 ; [#uses=1] - %10 = load i32* %9, align 4 ; [#uses=5] - %11 = and i32 %8, 65536 ; [#uses=1] - %12 = icmp eq i32 %11, 0 ; [#uses=1] - br i1 %12, label %bb1, label %bb - -bb: ; preds = %entry - %13 = and i32 %8, 994 ; [#uses=1] - %14 = load i32* @disparity0, align 4 ; [#uses=2] - store i32 %14, i32* @disparity1, align 4 - br label %bb8 - -bb1: ; preds = %entry - %15 = lshr i32 %8, 18 ; [#uses=1] - %16 = and i32 %15, 1 ; [#uses=1] - %17 = load i32* @disparity0, align 4 ; [#uses=4] - %18 = icmp eq i32 %16, %17 ; [#uses=1] - %not = select i1 %18, i32 0, i32 994 ; [#uses=1] - %.masked = and i32 %8, 994 ; [#uses=1] - %result.1 = xor i32 %not, %.masked ; [#uses=2] - %19 = and i32 %8, 524288 ; [#uses=1] - %20 = icmp eq i32 %19, 0 ; [#uses=1] - br i1 %20, label %bb7, label %bb6 - -bb6: ; preds = %bb1 - %21 = xor i32 %17, 1 ; [#uses=2] - store i32 %21, i32* @disparity1, align 4 - br label %bb8 - -bb7: ; preds = %bb1 - store i32 %17, i32* @disparity1, align 4 - br label %bb8 - -bb8: ; preds = %bb7, %bb6, %bb - %22 = phi i32 [ %17, %bb7 ], [ %21, %bb6 ], [ %14, %bb ] ; [#uses=4] - %result.0 = phi i32 [ %result.1, %bb7 ], [ %result.1, %bb6 ], [ %13, %bb ] ; [#uses=2] - %23 = and i32 %10, 65536 ; [#uses=1] - %24 = icmp eq i32 %23, 0 ; [#uses=1] - br i1 %24, label %bb10, label %bb9 - -bb9: ; preds = %bb8 - %25 = and i32 %10, 29 ; [#uses=1] - %26 = or i32 %result.0, %25 ; [#uses=1] - store i32 %22, i32* @disparity0, align 4 - ret i32 %26 - -bb10: ; preds = %bb8 - %27 = lshr i32 %10, 18 ; [#uses=1] - %28 = and i32 %27, 1 ; [#uses=1] - %29 = icmp eq i32 %28, %22 ; [#uses=1] - %not13 = select i1 %29, i32 0, i32 29 ; [#uses=1] - %.masked20 = and i32 %10, 29 ; [#uses=1] - %.pn = xor i32 %not13, %.masked20 ; [#uses=1] - %result.3 = or i32 %.pn, %result.0 ; [#uses=2] - %30 = and i32 %10, 524288 ; [#uses=1] - %31 = icmp eq i32 %30, 0 ; [#uses=1] - br i1 %31, label %bb17, label %bb16 - -bb16: ; preds = %bb10 - %32 = xor i32 %22, 1 ; [#uses=1] - store i32 %32, i32* @disparity0, align 4 - ret i32 %result.3 - -bb17: ; preds = %bb10 - store i32 %22, i32* @disparity0, align 4 - ret i32 %result.3 -} diff --git a/test/CodeGen/X86/2009-03-16-SpillerBug.ll b/test/CodeGen/X86/2009-03-16-SpillerBug.ll index 80e7639e7c29..951e191cd293 100644 --- a/test/CodeGen/X86/2009-03-16-SpillerBug.ll +++ b/test/CodeGen/X86/2009-03-16-SpillerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -stats |& grep virtregrewriter | not grep {stores unfolded} +; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=linearscan -stats |& grep virtregrewriter | not grep {stores unfolded} ; rdar://6682365 ; Do not clobber a register if another spill slot is available in it and it's marked "do not clobber". diff --git a/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll b/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll index fcb2ed07dc13..f739216f825a 100644 --- a/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll +++ b/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 82 +; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 77 ; rdar://6802189 ; Test if linearscan is unfavoring registers for allocation to allow more reuse diff --git a/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll b/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll index 69f644f5834b..620e0f366740 100644 --- a/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll +++ b/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll @@ -1,5 +1,5 @@ ; RUN: llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic -asm-verbose=false \ -; RUN: -disable-fp-elim -mattr=-sse41,-sse3,+sse2 -post-RA-scheduler=false < %s | \ +; RUN: -disable-fp-elim -mattr=-sse41,-sse3,+sse2 -post-RA-scheduler=false -regalloc=linearscan < %s | \ ; RUN: FileCheck %s ; rdar://6808032 diff --git a/test/CodeGen/X86/2009-04-24.ll b/test/CodeGen/X86/2009-04-24.ll index dd8823574cde..d6ed0c42230d 100644 --- a/test/CodeGen/X86/2009-04-24.ll +++ b/test/CodeGen/X86/2009-04-24.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -relocation-model=pic > %t2 ; RUN: grep {leaq.*TLSGD} %t2 -; RUN; grep {__tls_get_addr} %t2 +; RUN: grep {__tls_get_addr} %t2 ; PR4004 @i = thread_local global i32 15 diff --git a/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll b/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll index 7325f4ae1251..f6ac2ba60647 100644 --- a/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll +++ b/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll @@ -11,7 +11,7 @@ ; Move return address (76(%esp)) to a temporary register (%ebp) ; CHECK: movl 76(%esp), [[REGISTER:%[a-z]+]] ; Overwrite return addresss -; CHECK: movl %ebx, 76(%esp) +; CHECK: movl [[EBX:%[a-z]+]], 76(%esp) ; Move return address from temporary register (%ebp) to new stack location (60(%esp)) ; CHECK: movl [[REGISTER]], 60(%esp) diff --git a/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll b/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll index fa3d5fbcdc48..69787c78cfd6 100644 --- a/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll +++ b/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll @@ -31,18 +31,19 @@ entry: ret void } +; CHECK: ti64 define void @ti64(double %a, double %b) nounwind { entry: %tmp1 = bitcast double %a to <1 x i64> %tmp2 = bitcast double %b to <1 x i64> %tmp3 = add <1 x i64> %tmp1, %tmp2 -; CHECK: addq %rax, %rcx +; CHECK: addq store <1 x i64> %tmp3, <1 x i64>* null ret void } ; MMX intrinsics calls get us MMX instructions. - +; CHECK: ti8a define void @ti8a(double %a, double %b) nounwind { entry: %tmp1 = bitcast double %a to x86_mmx diff --git a/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll b/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll index 323925c7ff68..5accfd74c0a9 100644 --- a/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll +++ b/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll @@ -22,8 +22,8 @@ while.end: ; preds = %while.cond, %entry %conv = zext i32 %v to i64 ; [#uses=1] %conv14 = zext i32 %div11 to i64 ; [#uses=1] ; Verify that we don't clobber %eax after putting the imulq result in %rax -; CHECK: imulq %r{{.}}x, %r[[RES:.]]x -; CHECK-NOT: movl {{.*}}, %e[[RES]]x +; CHECK: imulq %r{{.}}x, %r[[RES:..]] +; CHECK-NOT: movl {{.*}}, %e[[RES]] ; CHECK: div %mul = mul i64 %conv14, %conv ; [#uses=1] %conv16 = zext i32 %div to i64 ; [#uses=1] diff --git a/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll b/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll index f9bda7f1007e..848af82da820 100644 --- a/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll +++ b/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=x86-64 -O2 < %s | FileCheck %s +; RUN: llc -march=x86-64 -O2 -regalloc=basic < %s | FileCheck %s ; Test to check .debug_loc support. This test case emits many debug_loc entries. ; CHECK: Loc expr size diff --git a/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll b/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll index 60171eb62973..6600cc3cae4f 100644 --- a/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll +++ b/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll @@ -1,6 +1,7 @@ ; RUN: llc -O2 < %s | FileCheck %s +; RUN: llc -O2 -regalloc=basic < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" -target triple = "x86_64-apple-darwin" +target triple = "x86_64-apple-darwin10" %struct.a = type { i32, %struct.a* } @@ -55,12 +56,21 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !29 = metadata !{i32 524299, metadata !9, i32 17, i32 0} ; [ DW_TAG_lexical_block ] !30 = metadata !{i32 19, i32 0, metadata !29, null} +; The variable bar:myvar changes registers after the first movq. +; It is cobbered by popq %rbx +; CHECK: movq +; CHECK-NEXT: [[LABEL:Ltmp[0-9]*]] +; CHECK: .loc 1 19 0 +; CHECK: popq +; CHECK-NEXT: [[CLOBBER:Ltmp[0-9]*]] + + ; CHECK: Ldebug_loc0: ; CHECK-NEXT: .quad Lfunc_begin0 -; CHECK-NEXT: .quad Ltmp3 +; CHECK-NEXT: .quad [[LABEL]] ; CHECK-NEXT: .short 1 ; CHECK-NEXT: .byte 85 -; CHECK-NEXT: .quad Ltmp3 -; CHECK-NEXT: .quad Ltmp6 +; CHECK-NEXT: .quad [[LABEL]] +; CHECK-NEXT: .quad [[CLOBBER]] ; CHECK-NEXT: .short 1 ; CHECK-NEXT: .byte 83 diff --git a/test/CodeGen/X86/2010-05-28-Crash.ll b/test/CodeGen/X86/2010-05-28-Crash.ll index ad8546ef8ce8..1a0da3177a22 100644 --- a/test/CodeGen/X86/2010-05-28-Crash.ll +++ b/test/CodeGen/X86/2010-05-28-Crash.ll @@ -1,4 +1,5 @@ ; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-apple-darwin -regalloc=basic < %s | FileCheck %s ; Test to check separate label for inlined function argument. define i32 @foo(i32 %y) nounwind optsize ssp { diff --git a/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll b/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll index 812d3720d6f5..a9c03ee563d8 100644 --- a/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll +++ b/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll @@ -1,4 +1,5 @@ -; RUN: llc -O2 < %s | FileCheck %s +; RUN: llc -O2 < %s | FileCheck %s +; RUN: llc -O2 -regalloc=basic < %s | FileCheck %s ; Test to check that unused argument 'this' is not undefined in debug info. target triple = "x86_64-apple-darwin10.2" diff --git a/test/CodeGen/X86/2010-08-04-StackVariable.ll b/test/CodeGen/X86/2010-08-04-StackVariable.ll index edfd1b868737..ba36fe7c12fd 100644 --- a/test/CodeGen/X86/2010-08-04-StackVariable.ll +++ b/test/CodeGen/X86/2010-08-04-StackVariable.ll @@ -1,5 +1,5 @@ -; RUN: llc -O0 -mtriple=x86_64-apple-darwin < %s | grep DW_OP_fbreg -; Use DW_OP_fbreg in variable's location expression if the variable is in a stack slot. +; RUN: llc -O0 -mtriple=x86_64-apple-darwin < %s | grep DW_OP_breg7 +; Use DW_OP_breg7 in variable's location expression if the variable is in a stack slot. %struct.SVal = type { i8*, i32 } diff --git a/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll b/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll index 8fe0309421e5..eaede30f9b55 100644 --- a/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll +++ b/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll @@ -18,9 +18,9 @@ entry: ret i32 0 } -; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), %rax -; CHECK: movb 30(%rsp), %dl -; CHECK: movb (%rsp), %sil -; CHECK: movb %sil, (%rsp) -; CHECK: movb %dl, 30(%rsp) +; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip) +; CHECK: movb 38(%rsp), [[R0:%.+]] +; CHECK: movb 8(%rsp), [[R1:%.+]] +; CHECK: movb [[R1]], 8(%rsp) +; CHECK: movb [[R0]], 38(%rsp) ; CHECK: callq ___stack_chk_fail diff --git a/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll b/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll index cae81d086ea1..73e996c5d553 100644 --- a/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll +++ b/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll @@ -1,4 +1,4 @@ -; RUN: llc -verify-machineinstrs -cgp-critical-edge-splitting=0 -mcpu=i386 < %s +; RUN: llc -verify-machineinstrs -mcpu=i386 < %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" target triple = "i386-pc-linux-gnu" diff --git a/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll b/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll index 973975b658a3..7f134113b2e3 100644 --- a/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll +++ b/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s | FileCheck %s +; RUN: llc < %s -regalloc=basic | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.0.0" diff --git a/test/CodeGen/X86/2011-02-27-Fpextend.ll b/test/CodeGen/X86/2011-02-27-Fpextend.ll new file mode 100644 index 000000000000..c12b9563b305 --- /dev/null +++ b/test/CodeGen/X86/2011-02-27-Fpextend.ll @@ -0,0 +1,7 @@ +; RUN: llc -mtriple=x86_64-pc-linux < %s +; PR9309 + +define <4 x double> @f_fu(<4 x float>) nounwind { + %float2double.i = fpext <4 x float> %0 to <4 x double> + ret <4 x double> %float2double.i +} diff --git a/test/CodeGen/X86/2011-03-02-DAGCombiner.ll b/test/CodeGen/X86/2011-03-02-DAGCombiner.ll new file mode 100644 index 000000000000..be58cedfdaa7 --- /dev/null +++ b/test/CodeGen/X86/2011-03-02-DAGCombiner.ll @@ -0,0 +1,51 @@ +; RUN: llc < %s -march=x86-64 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin11.0.0" + +%0 = type { i8, [3 x i8] } +%struct.anon = type { float, x86_fp80 } + +define i32 @main() nounwind ssp { +entry: + %retval = alloca i32, align 4 + %F = alloca %struct.anon, align 16 + %K = alloca %0, align 4 + store i32 0, i32* %retval + %0 = bitcast %0* %K to i32* + %1 = load i32* %0, align 4 + %2 = and i32 %1, -121 + %3 = or i32 %2, 32 + store i32 %3, i32* %0, align 4 + %4 = bitcast %0* %K to i32* + %5 = load i32* %4, align 4 + %6 = lshr i32 %5, 3 + %bf.clear = and i32 %6, 15 + %conv = sitofp i32 %bf.clear to float + %f = getelementptr inbounds %struct.anon* %F, i32 0, i32 0 + %tmp = load float* %f, align 4 + %sub = fsub float %tmp, %conv + store float %sub, float* %f, align 4 + %ld = getelementptr inbounds %struct.anon* %F, i32 0, i32 1 + %tmp1 = load x86_fp80* %ld, align 16 + %7 = bitcast %0* %K to i32* + %8 = load i32* %7, align 4 + %9 = lshr i32 %8, 7 + %bf.clear2 = and i32 %9, 1 + %conv3 = uitofp i32 %bf.clear2 to x86_fp80 + %sub4 = fsub x86_fp80 %conv3, %tmp1 + %conv5 = fptoui x86_fp80 %sub4 to i32 + %bf.value = and i32 %conv5, 1 + %10 = bitcast %0* %K to i32* + %11 = and i32 %bf.value, 1 + %12 = shl i32 %11, 7 + %13 = load i32* %10, align 4 + %14 = and i32 %13, -129 + %15 = or i32 %14, %12 + store i32 %15, i32* %10, align 4 + %call = call i32 (...)* @iequals(i32 1841, i32 %bf.value, i32 0) + %16 = load i32* %retval + ret i32 %16 +} + +declare i32 @iequals(...) diff --git a/test/CodeGen/X86/2011-03-08-Sched-crash.ll b/test/CodeGen/X86/2011-03-08-Sched-crash.ll new file mode 100644 index 000000000000..6329ae670e48 --- /dev/null +++ b/test/CodeGen/X86/2011-03-08-Sched-crash.ll @@ -0,0 +1,56 @@ +; RUN: llc < %s +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" +target triple = "i386-apple-darwin9.0.0" + +%0 = type { i32, i1 } + +declare %0 @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone + +define linkonce_odr hidden void @_ZN2js5QueueINS_7SlotMap8SlotInfoEE6ensureEj(i8* nocapture %this, i32 %size) nounwind align 2 { + br i1 undef, label %14, label %1 + +;