6 files changed, 70 insertions, 0 deletions

diff --git a/cad/Makefile b/cad/Makefile
index 84a09a8d16ba..1d543c574eec 100644
--- a/cad/Makefile
+++ b/cad/Makefile
@@ -71,6 +71,7 @@
     SUBDIR += magic
     SUBDIR += meshdev
     SUBDIR += netgen
+    SUBDIR += netgen-lvs
     SUBDIR += ngspice_rework
     SUBDIR += nvc
     SUBDIR += opencascade
diff --git a/cad/netgen-lvs/Makefile b/cad/netgen-lvs/Makefile
new file mode 100644
index 000000000000..1d85b4b19c17
--- /dev/null
+++ b/cad/netgen-lvs/Makefile
@@ -0,0 +1,25 @@
+# $FreeBSD$
+
+PORTNAME=	netgen
+DISTVERSION=	1.5.144
+CATEGORIES=	cad
+MASTER_SITES=	http://opencircuitdesign.com/netgen/archive/
+PKGNAMESUFFIX=	-lvs
+
+MAINTAINER=	yuri@FreeBSD.org
+COMMENT=	Tool for comparing netlists (a process known as LVS)
+
+LICENSE=	GPLv1
+LICENSE_FILE=	${WRKSRC}/Copying
+
+USES=		gmake python tar:tgz
+
+GNU_CONFIGURE=	yes
+
+post-patch:
+	@${REINPLACE_CMD} -e 's|^#!/bin/env python3$$|#!${PYTHON_CMD}|' ${WRKSRC}/python/*.py
+
+post-stage:
+	@${STRIP_CMD} ${STAGEDIR}${PREFIX}/bin/*
+
+.include <bsd.port.mk>
diff --git a/cad/netgen-lvs/distinfo b/cad/netgen-lvs/distinfo
new file mode 100644
index 000000000000..e5360fde4474
--- /dev/null
+++ b/cad/netgen-lvs/distinfo
@@ -0,0 +1,3 @@
+TIMESTAMP = 1584583774
+SHA256 (netgen-1.5.144.tgz) = 209b801d8c8051f60cf0845e564a5b200791b6a955d96f64d1b4d959133d9aa9
+SIZE (netgen-1.5.144.tgz) = 522869
diff --git a/cad/netgen-lvs/files/patch-python_Makefile b/cad/netgen-lvs/files/patch-python_Makefile
new file mode 100644
index 000000000000..4b7611e1e82c
--- /dev/null
+++ b/cad/netgen-lvs/files/patch-python_Makefile
@@ -0,0 +1,12 @@
+--- python/Makefile.orig	2020-02-24 21:24:48 UTC
++++ python/Makefile
+@@ -46,6 +46,9 @@ $(DESTDIR)${INSTALL_PYDIR}/lvs_help.txt: lvs_help.txt
+ 
+ install: install-tcl
+ 
++$(DESTDIR)${INSTALL_PYDIR}:
++	mkdir -p $(DESTDIR)${INSTALL_PYDIR}
++
+ install-tcl: $(DESTDIR)${INSTALL_PYDIR} $(DESTDIR)${INSTALL_PYDIR}/consoletext.py \
+ 	$(DESTDIR)${INSTALL_PYDIR}/helpwindow.py $(DESTDIR)${INSTALL_PYDIR}/lvs_manager.py \
+ 	$(DESTDIR)${INSTALL_PYDIR}/treeviewsplit.py $(DESTDIR)${INSTALL_PYDIR}/tksimpledialog.py \
diff --git a/cad/netgen-lvs/pkg-descr b/cad/netgen-lvs/pkg-descr
new file mode 100644
index 000000000000..691f20560467
--- /dev/null
+++ b/cad/netgen-lvs/pkg-descr
@@ -0,0 +1,12 @@
+Netgen is a tool for comparing netlists, a process known as LVS, which stands
+for "Layout vs. Schematic". This is an important step in the integrated circuit
+design flow, ensuring that the geometry that has been laid out matches the
+expected circuit. Very small circuits can bypass this step by confirming circuit
+operation through extraction and simulation. Very large digital circuits are
+usually generated by tools from high-level descriptions, using compilers that
+ensure the correct layout geometry. The greatest need for LVS is in large analog
+or mixed-signal circuits that cannot be simulated in reasonable time. Even for
+small circuits, LVS can be done much faster than simulation, and provides
+feedback that makes it easier to find an error than does a simulation.
+
+WWW: http://opencircuitdesign.com/netgen/
diff --git a/cad/netgen-lvs/pkg-plist b/cad/netgen-lvs/pkg-plist
new file mode 100644
index 000000000000..43ab4edfafe9
--- /dev/null
+++ b/cad/netgen-lvs/pkg-plist
@@ -0,0 +1,17 @@
+bin/inetcomp
+bin/netcomp
+bin/netgen
+bin/ntk2adl
+bin/ntk2xnf
+lib/netgen/doc/netgen.doc
+lib/netgen/ntk2adl.sh
+lib/netgen/python/consoletext.py
+lib/netgen/python/helpwindow.py
+lib/netgen/python/lvs_help.txt
+lib/netgen/python/lvs_manager.py
+lib/netgen/python/tksimpledialog.py
+lib/netgen/python/tooltip.py
+lib/netgen/python/treeviewsplit.py
+lib/netgen/spice
+lib/netgen/spice.bot
+lib/netgen/spice.top