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authorMartin Wilke <miwi@FreeBSD.org>2009-11-04 15:43:10 +0000
committerMartin Wilke <miwi@FreeBSD.org>2009-11-04 15:43:10 +0000
commitcdd7d962f846f55d14517a7507693e49bec0b784 (patch)
tree0452c24543f6682424548cc160c211f417e2938d /cad/p5-Verilog-Perl
parentffb2bf0b76c2d24f2575a1978de631e115bb719c (diff)
downloadports-cdd7d962f846f55d14517a7507693e49bec0b784.tar.gz
ports-cdd7d962f846f55d14517a7507693e49bec0b784.zip
- Update to 3.221
PR: 140231 Submitted by: Otacílio de Araújo Ramos Neto <otacilio.neto@ee.ufcg.edu.br> (maintainer)
Notes
Notes: svn path=/head/; revision=243787
Diffstat (limited to 'cad/p5-Verilog-Perl')
-rw-r--r--cad/p5-Verilog-Perl/Makefile9
-rw-r--r--cad/p5-Verilog-Perl/distinfo6
-rw-r--r--cad/p5-Verilog-Perl/pkg-plist1
3 files changed, 9 insertions, 7 deletions
diff --git a/cad/p5-Verilog-Perl/Makefile b/cad/p5-Verilog-Perl/Makefile
index 820f66679d77..aefc919dbdb1 100644
--- a/cad/p5-Verilog-Perl/Makefile
+++ b/cad/p5-Verilog-Perl/Makefile
@@ -1,12 +1,12 @@
-# New ports collection makefile for: Verilog-Perl
-# Date created: 11 Apr 2009
-# Whom: Otacílio de Araújo Ramos Neto <otacilio.neto@ee.ufcg.edu.br>
+# New ports collection makefile for: Verilog-Perl
+# Date created: 11 Apr 2009
+# Whom: Otacilio de Araujo Ramos Neto <otacilio.neto@ee.ufcg.edu.br>
#
# $FreeBSD$
#
PORTNAME= Verilog-Perl
-PORTVERSION= 3.212
+PORTVERSION= 3.221
CATEGORIES= cad perl5
MASTER_SITES= CPAN
PKGNAMEPREFIX= p5-
@@ -30,6 +30,7 @@ MAN3= Verilog::EditFiles.3 Verilog::Netlist::Logger.3 \
Verilog::SigParser.3 Verilog::Netlist.3 Verilog::Netlist::Pin.3 \
Verilog::Netlist::Cell.3 Verilog::Netlist::Port.3 \
Verilog::Netlist::File.3 Verilog::Netlist::Subclass.3 \
+ Verilog::Netlist::ContAssign.3 \
Verilog::Verilog-Perl.3 Verilog::Netlist::Interface.3 Verilog::Std.3
.include <bsd.port.pre.mk>
diff --git a/cad/p5-Verilog-Perl/distinfo b/cad/p5-Verilog-Perl/distinfo
index c6281df41856..8b272d395a83 100644
--- a/cad/p5-Verilog-Perl/distinfo
+++ b/cad/p5-Verilog-Perl/distinfo
@@ -1,3 +1,3 @@
-MD5 (Verilog-Perl-3.212.tar.gz) = 5682e42a4904d41206782128b174a7d1
-SHA256 (Verilog-Perl-3.212.tar.gz) = 8d6829d1062bfd7a343df27c1efeb15a2e79abfc17bafb5e3e8acdf989ad3fd0
-SIZE (Verilog-Perl-3.212.tar.gz) = 203811
+MD5 (Verilog-Perl-3.221.tar.gz) = 75f43ca63bcbe927efeabc80830c8dbd
+SHA256 (Verilog-Perl-3.221.tar.gz) = 443b4875416592b4d1c12652b1507fe78f4123f94951fd30fdabea6e674c4e3f
+SIZE (Verilog-Perl-3.221.tar.gz) = 210188
diff --git a/cad/p5-Verilog-Perl/pkg-plist b/cad/p5-Verilog-Perl/pkg-plist
index 9956754364b2..0a6ae7708d2f 100644
--- a/cad/p5-Verilog-Perl/pkg-plist
+++ b/cad/p5-Verilog-Perl/pkg-plist
@@ -15,6 +15,7 @@ bin/vrename
%%SITE_PERL%%/%%PERL_ARCH%%/Verilog/Netlist/Pin.pm
%%SITE_PERL%%/%%PERL_ARCH%%/Verilog/Netlist/Port.pm
%%SITE_PERL%%/%%PERL_ARCH%%/Verilog/Netlist/Subclass.pm
+%%SITE_PERL%%/%%PERL_ARCH%%/Verilog/Netlist/ContAssign.pm
%%SITE_PERL%%/%%PERL_ARCH%%/Verilog/Parser.pm
%%SITE_PERL%%/%%PERL_ARCH%%/Verilog/Preproc.pm
%%SITE_PERL%%/%%PERL_ARCH%%/Verilog/SigParser.pm