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authorYuri Victorovich <yuri@FreeBSD.org>2022-07-22 17:03:01 +0000
committerYuri Victorovich <yuri@FreeBSD.org>2022-07-22 17:05:30 +0000
commitb535ab28c4ab76ec5d0727382946fbc539566f58 (patch)
tree7042872e8b53474a836ed6a7801039cf6719100e /cad
parent5a133e19607d5199549bbb28e2e90273663cea05 (diff)
downloadports-b535ab28c4ab76ec5d0727382946fbc539566f58.tar.gz
ports-b535ab28c4ab76ec5d0727382946fbc539566f58.zip
Diffstat (limited to 'cad')
-rw-r--r--cad/surelog/Makefile2
1 files changed, 2 insertions, 0 deletions
diff --git a/cad/surelog/Makefile b/cad/surelog/Makefile
index baa6033a4fda..ec58d7a0caf2 100644
--- a/cad/surelog/Makefile
+++ b/cad/surelog/Makefile
@@ -10,6 +10,8 @@ COMMENT= SystemVerilog 2017 Pre-processor, Parser, Elaborator, etc
LICENSE= APACHE20
LICENSE_FILE= ${WRKSRC}/LICENSE
+BROKEN_aarch64= Creating OVM precompiled package... Segmentation fault (core dumped) # update to the current revision might help but it has C++ errors
+
BUILD_DEPENDS= utf8cpp>0:devel/utf8cpp \
${PYTHON_PKGNAMEPREFIX}orderedmultidict>0:devel/py-orderedmultidict@${PY_FLAVOR}
LIB_DEPENDS= libtcmalloc.so:devel/google-perftools