diff options
Diffstat (limited to 'devel/electron37/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32-inl.h')
| -rw-r--r-- | devel/electron37/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32-inl.h | 128 |
1 files changed, 128 insertions, 0 deletions
diff --git a/devel/electron37/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32-inl.h b/devel/electron37/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32-inl.h new file mode 100644 index 000000000000..41c2c3213cf9 --- /dev/null +++ b/devel/electron37/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32-inl.h @@ -0,0 +1,128 @@ +--- v8/src/wasm/baseline/ia32/liftoff-assembler-ia32-inl.h.orig 2025-06-30 07:04:30 UTC ++++ v8/src/wasm/baseline/ia32/liftoff-assembler-ia32-inl.h +@@ -597,7 +597,7 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Regis + } + + void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, +- Register offset_reg, uint32_t offset_imm, ++ Register offset_reg, uintptr_t offset_imm, + LoadType type, uint32_t* protected_load_pc, + bool /* is_load_mem */, bool /* i64_offset */, + bool needs_shift) { +@@ -677,7 +677,7 @@ void LiftoffAssembler::Store(Register dst_addr, Regist + } + + void LiftoffAssembler::Store(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister src, ++ uintptr_t offset_imm, LiftoffRegister src, + StoreType type, LiftoffRegList pinned, + uint32_t* protected_store_pc, + bool /* is_store_mem */, bool /* i64_offset */) { +@@ -756,7 +756,7 @@ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, + } + + void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr, +- Register offset_reg, uint32_t offset_imm, ++ Register offset_reg, uintptr_t offset_imm, + LoadType type, LiftoffRegList /* pinned */, + bool /* i64_offset */) { + if (type.value() != LoadType::kI64Load) { +@@ -774,7 +774,7 @@ void LiftoffAssembler::AtomicStore(Register dst_addr, + } + + void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister src, ++ uintptr_t offset_imm, LiftoffRegister src, + StoreType type, LiftoffRegList pinned, + bool /* i64_offset */) { + DCHECK_LE(offset_imm, std::numeric_limits<int32_t>::max()); +@@ -844,7 +844,7 @@ inline void AtomicAddOrSubOrExchange32(LiftoffAssemble + + inline void AtomicAddOrSubOrExchange32(LiftoffAssembler* lasm, Binop binop, + Register dst_addr, Register offset_reg, +- uint32_t offset_imm, ++ uintptr_t offset_imm, + LiftoffRegister value, + LiftoffRegister result, StoreType type) { + DCHECK_EQ(value, result); +@@ -912,7 +912,7 @@ inline void AtomicBinop32(LiftoffAssembler* lasm, Bino + } + + inline void AtomicBinop32(LiftoffAssembler* lasm, Binop op, Register dst_addr, +- Register offset_reg, uint32_t offset_imm, ++ Register offset_reg, uintptr_t offset_imm, + LiftoffRegister value, LiftoffRegister result, + StoreType type) { + DCHECK_EQ(value, result); +@@ -1027,7 +1027,7 @@ inline void AtomicBinop64(LiftoffAssembler* lasm, Bino + } + + inline void AtomicBinop64(LiftoffAssembler* lasm, Binop op, Register dst_addr, +- Register offset_reg, uint32_t offset_imm, ++ Register offset_reg, uintptr_t offset_imm, + LiftoffRegister value, LiftoffRegister result) { + // We need {ebx} here, which is the root register. As the root register it + // needs special treatment. As we use {ebx} directly in the code below, we +@@ -1123,7 +1123,7 @@ void LiftoffAssembler::AtomicAdd(Register dst_addr, Re + } // namespace liftoff + + void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister value, ++ uintptr_t offset_imm, LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { + if (type.value() == StoreType::kI64Store) { +@@ -1137,7 +1137,7 @@ void LiftoffAssembler::AtomicSub(Register dst_addr, Re + } + + void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister value, ++ uintptr_t offset_imm, LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { + if (type.value() == StoreType::kI64Store) { +@@ -1150,7 +1150,7 @@ void LiftoffAssembler::AtomicAnd(Register dst_addr, Re + } + + void LiftoffAssembler::AtomicAnd(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister value, ++ uintptr_t offset_imm, LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { + if (type.value() == StoreType::kI64Store) { +@@ -1164,7 +1164,7 @@ void LiftoffAssembler::AtomicOr(Register dst_addr, Reg + } + + void LiftoffAssembler::AtomicOr(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister value, ++ uintptr_t offset_imm, LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { + if (type.value() == StoreType::kI64Store) { +@@ -1178,7 +1178,7 @@ void LiftoffAssembler::AtomicXor(Register dst_addr, Re + } + + void LiftoffAssembler::AtomicXor(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister value, ++ uintptr_t offset_imm, LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { + if (type.value() == StoreType::kI64Store) { +@@ -1192,7 +1192,7 @@ void LiftoffAssembler::AtomicExchange(Register dst_add + } + + void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, ++ uintptr_t offset_imm, + LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { +@@ -1207,7 +1207,7 @@ void LiftoffAssembler::AtomicCompareExchange( + } + + void LiftoffAssembler::AtomicCompareExchange( +- Register dst_addr, Register offset_reg, uint32_t offset_imm, ++ Register dst_addr, Register offset_reg, uintptr_t offset_imm, + LiftoffRegister expected, LiftoffRegister new_value, LiftoffRegister result, + StoreType type, bool /* i64_offset */) { + // We expect that the offset has already been added to {dst_addr}, and no |