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authorIan Lepore <ian@FreeBSD.org>2017-03-19 21:28:37 +0000
committerIan Lepore <ian@FreeBSD.org>2017-03-19 21:28:37 +0000
commit5e52290fda2972bad6ae3525812ad8a5171d2aa4 (patch)
tree159f9e0a650260e9e2fbc69eaa52e63b83a7a29a
parent133cbe3b59686809313e078dab831347e99ad971 (diff)
Notes
-rw-r--r--sys/arm/freescale/imx/imx_gpt.c18
1 files changed, 12 insertions, 6 deletions
diff --git a/sys/arm/freescale/imx/imx_gpt.c b/sys/arm/freescale/imx/imx_gpt.c
index ea4a37d53dc0e..e17e3b284c640 100644
--- a/sys/arm/freescale/imx/imx_gpt.c
+++ b/sys/arm/freescale/imx/imx_gpt.c
@@ -83,6 +83,7 @@ struct imx_gpt_softc {
uint32_t sc_period;
uint32_t sc_clksrc;
uint32_t clkfreq;
+ uint32_t ir_reg;
struct eventtimer et;
};
@@ -284,16 +285,20 @@ imx_gpt_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
/* Set expected value */
WRITE4(sc, IMX_GPT_OCR2, READ4(sc, IMX_GPT_CNT) + sc->sc_period);
/* Enable compare register 2 Interrupt */
- SET4(sc, IMX_GPT_IR, GPT_IR_OF2);
+ sc->ir_reg |= GPT_IR_OF2;
+ WRITE4(sc, IMX_GPT_IR, sc->ir_reg);
return (0);
} else if (first != 0) {
+ /* Enable compare register 3 interrupt if not already on. */
+ if ((sc->ir_reg & GPT_IR_OF3) == 0) {
+ sc->ir_reg |= GPT_IR_OF3;
+ WRITE4(sc, IMX_GPT_IR, sc->ir_reg);
+ }
ticks = ((uint32_t)et->et_frequency * first) >> 32;
/* Do not disturb, otherwise event will be lost */
spinlock_enter();
/* Set expected value */
WRITE4(sc, IMX_GPT_OCR3, READ4(sc, IMX_GPT_CNT) + ticks);
- /* Enable compare register 1 Interrupt */
- SET4(sc, IMX_GPT_IR, GPT_IR_OF3);
/* Now everybody can relax */
spinlock_exit();
return (0);
@@ -309,9 +314,10 @@ imx_gpt_timer_stop(struct eventtimer *et)
sc = (struct imx_gpt_softc *)et->et_priv;
- /* Disable OF2 Interrupt */
- CLEAR4(sc, IMX_GPT_IR, GPT_IR_OF2);
- WRITE4(sc, IMX_GPT_SR, GPT_IR_OF2);
+ /* Disable interrupts and clear any pending status. */
+ sc->ir_reg &= ~(GPT_IR_OF2 | GPT_IR_OF3);
+ WRITE4(sc, IMX_GPT_IR, sc->ir_reg);
+ WRITE4(sc, IMX_GPT_SR, GPT_IR_OF2 | GPT_IR_OF3);
sc->sc_period = 0;
return (0);