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authorDimitry Andric <dim@FreeBSD.org>2017-07-29 21:25:18 +0000
committerDimitry Andric <dim@FreeBSD.org>2017-07-29 21:25:18 +0000
commit3ad6a4b447326bc16c17df65637ca02330b8d090 (patch)
tree568321855815f8ca008258972e27d4a3ea487475 /include/llvm/CodeGen/GlobalISel
parent93c91e39b29142dec1d03a30df9f6e757f56c193 (diff)
Notes
Diffstat (limited to 'include/llvm/CodeGen/GlobalISel')
-rw-r--r--include/llvm/CodeGen/GlobalISel/InstructionSelector.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/include/llvm/CodeGen/GlobalISel/InstructionSelector.h b/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
index 59a4073646ebb..1060d8fd667e6 100644
--- a/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
+++ b/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
@@ -40,7 +40,8 @@ class TargetRegisterInfo;
/// This is convenient because std::bitset does not have a constructor
/// with an initializer list of set bits.
///
-/// Each InstructionSelector subclass should define a PredicateBitset class with:
+/// Each InstructionSelector subclass should define a PredicateBitset class
+/// with:
/// const unsigned MAX_SUBTARGET_PREDICATES = 192;
/// using PredicateBitset = PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
/// and updating the constant to suit the target. Tablegen provides a suitable
@@ -102,7 +103,8 @@ enum {
/// - OpIdx - Operand index
/// - Expected integer
GIM_CheckConstantInt,
- /// Check the operand is a specific literal integer (i.e. MO.isImm() or MO.isCImm() is true).
+ /// Check the operand is a specific literal integer (i.e. MO.isImm() or
+ /// MO.isCImm() is true).
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - Expected integer