10 files changed, 201 insertions, 106 deletions

diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td
index 9a117dff31514..0cffffb88af18 100644
--- a/include/llvm/Target/Target.td
+++ b/include/llvm/Target/Target.td
@@ -211,16 +211,9 @@ class Instruction {
   //  hasSideEffects - The instruction has side effects that are not
   //    captured by any operands of the instruction or other flags.
   //
-  //  mayHaveSideEffects  - Some instances of the instruction can have side
-  //    effects. The virtual method "isReallySideEffectFree" is called to
-  //    determine this. Load instructions are an example of where this is
-  //    useful. In general, loads always have side effects. However, loads from
-  //    constant pools don't. Individual back ends make this determination.
-  //
   //  neverHasSideEffects - Set on an instruction with no pattern if it has no
   //    side effects.
   bit hasSideEffects = 0;
-  bit mayHaveSideEffects = 0;
   bit neverHasSideEffects = 0;
 
   // Is this instruction a "real" instruction (with a distinct machine
diff --git a/include/llvm/Target/TargetAsmBackend.h b/include/llvm/Target/TargetAsmBackend.h
new file mode 100644
index 0000000000000..dfdabdb7fa3b4
--- /dev/null
+++ b/include/llvm/Target/TargetAsmBackend.h
@@ -0,0 +1,35 @@
+//===-- llvm/Target/TargetAsmBackend.h - Target Asm Backend -----*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_TARGET_TARGETASMBACKEND_H
+#define LLVM_TARGET_TARGETASMBACKEND_H
+
+namespace llvm {
+class Target;
+
+/// TargetAsmBackend - Generic interface to target specific assembler backends.
+class TargetAsmBackend {
+  TargetAsmBackend(const TargetAsmBackend &);   // DO NOT IMPLEMENT
+  void operator=(const TargetAsmBackend &);  // DO NOT IMPLEMENT
+protected: // Can only create subclasses.
+  TargetAsmBackend(const Target &);
+
+  /// TheTarget - The Target that this machine was created for.
+  const Target &TheTarget;
+
+public:
+  virtual ~TargetAsmBackend();
+
+  const Target &getTarget() const { return TheTarget; }
+
+};
+
+} // End llvm namespace
+
+#endif
diff --git a/include/llvm/Target/TargetAsmParser.h b/include/llvm/Target/TargetAsmParser.h
index da9ba2b45b850..85315c155d8a9 100644
--- a/include/llvm/Target/TargetAsmParser.h
+++ b/include/llvm/Target/TargetAsmParser.h
@@ -42,8 +42,8 @@ public:
   /// line should be parsed up to and including the end-of-statement token. On
   /// failure, the parser is not required to read to the end of the line.
   //
-  /// \param AP - The current parser object.
   /// \param Name - The instruction name.
+  /// \param NameLoc - The source location of the name.
   /// \param Operands [out] - The list of parsed operands, this returns
   ///        ownership of them to the caller.
   /// \return True on failure.
@@ -59,7 +59,7 @@ public:
   /// the target, the entire line is parsed up to and including the
   /// end-of-statement token and false is returned.
   ///
-  /// \param ID - the identifier token of the directive.
+  /// \param DirectiveID - the identifier token of the directive.
   virtual bool ParseDirective(AsmToken DirectiveID) = 0;
   
   /// MatchInstruction - Recognize a series of operands of a parsed instruction
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index d95e4e8acdef2..4b26beb82cef2 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -19,14 +19,14 @@
 
 namespace llvm {
 
-class MCAsmInfo;
-class TargetRegisterClass;
-class TargetRegisterInfo;
-class LiveVariables;
 class CalleeSavedInfo;
+class LiveVariables;
+class MCAsmInfo;
+class MachineMemOperand;
 class SDNode;
 class SelectionDAG;
-class MachineMemOperand;
+class TargetRegisterClass;
+class TargetRegisterInfo;
 
 template<class T> class SmallVectorImpl;
 
@@ -243,13 +243,11 @@ public:
   virtual bool findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1,
                                      unsigned &SrcOpIdx2) const = 0;
 
-  /// isIdentical - Return true if two instructions are identical. This differs
-  /// from MachineInstr::isIdenticalTo() in that it does not require the
-  /// virtual destination registers to be the same. This is used by MachineLICM
-  /// and other MI passes to perform CSE.
-  virtual bool isIdentical(const MachineInstr *MI,
-                           const MachineInstr *Other,
-                           const MachineRegisterInfo *MRI) const = 0;
+  /// produceSameValue - Return true if two machine instructions would produce
+  /// identical values. By default, this is only true when the two instructions
+  /// are deemed identical except for defs.
+  virtual bool produceSameValue(const MachineInstr *MI0,
+                                const MachineInstr *MI1) const = 0;
 
   /// AnalyzeBranch - Analyze the branching code at the end of MBB, returning
   /// true if it cannot be understood (e.g. it's a switch dispatch or isn't
@@ -560,10 +558,8 @@ public:
                              const TargetRegisterInfo *TRI) const;
   virtual MachineInstr *duplicate(MachineInstr *Orig,
                                   MachineFunction &MF) const;
-  virtual bool isIdentical(const MachineInstr *MI,
-                           const MachineInstr *Other,
-                           const MachineRegisterInfo *MRI) const;
-
+  virtual bool produceSameValue(const MachineInstr *MI0,
+                                const MachineInstr *MI1) const;
   virtual unsigned GetFunctionSizeInBytes(const MachineFunction &MF) const;
 };
 
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index c6ac89a8ac199..60b7ebdbe85fc 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -1164,7 +1164,7 @@ public:
               bool isVarArg, bool isInreg, unsigned NumFixedArgs,
               CallingConv::ID CallConv, bool isTailCall,
               bool isReturnValueUsed, SDValue Callee, ArgListTy &Args,
-              SelectionDAG &DAG, DebugLoc dl, unsigned Order);
+              SelectionDAG &DAG, DebugLoc dl);
 
   /// LowerCall - This hook must be implemented to lower calls into the
   /// the specified DAG. The outgoing arguments to the call are described
diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h
index c496e11926e12..a7062ac94f35d 100644
--- a/include/llvm/Target/TargetMachine.h
+++ b/include/llvm/Target/TargetMachine.h
@@ -189,8 +189,9 @@ public:
   /// is not supported, or false on success.
   virtual bool addPassesToEmitFile(PassManagerBase &,
                                    formatted_raw_ostream &,
-                                   CodeGenFileType Filetype,
-                                   CodeGenOpt::Level) {
+                                   CodeGenFileType,
+                                   CodeGenOpt::Level,
+                                   bool DisableVerify = true) {
     return true;
   }
 
@@ -202,7 +203,8 @@ public:
   ///
   virtual bool addPassesToEmitMachineCode(PassManagerBase &,
                                           JITCodeEmitter &,
-                                          CodeGenOpt::Level) {
+                                          CodeGenOpt::Level,
+                                          bool DisableVerify = true) {
     return true;
   }
 
@@ -212,7 +214,8 @@ public:
   virtual bool WantsWholeFile() const { return false; }
   virtual bool addPassesToEmitWholeFile(PassManager &, formatted_raw_ostream &,
                                         CodeGenFileType,
-                                        CodeGenOpt::Level) {
+                                        CodeGenOpt::Level,
+                                        bool DisableVerify = true) {
     return true;
   }
 };
@@ -227,7 +230,8 @@ protected: // Can only create subclasses.
   /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
   /// both emitting to assembly files or machine code output.
   ///
-  bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
+  bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level,
+                              bool DisableVerify);
 
 private:
   virtual void setCodeModelForJIT();
@@ -242,7 +246,8 @@ public:
   virtual bool addPassesToEmitFile(PassManagerBase &PM,
                                    formatted_raw_ostream &Out,
                                    CodeGenFileType FileType,
-                                   CodeGenOpt::Level);
+                                   CodeGenOpt::Level,
+                                   bool DisableVerify = true);
   
   /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
   /// get machine code emitted.  This uses a JITCodeEmitter object to handle
@@ -252,7 +257,8 @@ public:
   ///
   virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
                                           JITCodeEmitter &MCE,
-                                          CodeGenOpt::Level);
+                                          CodeGenOpt::Level,
+                                          bool DisableVerify = true);
   
   /// Target-Independent Code Generator Pass Configuration Options.
   
diff --git a/include/llvm/Target/TargetOpcodes.h b/include/llvm/Target/TargetOpcodes.h
index 10cb45fa53459..48665b7431f28 100644
--- a/include/llvm/Target/TargetOpcodes.h
+++ b/include/llvm/Target/TargetOpcodes.h
@@ -16,7 +16,7 @@
 
 namespace llvm {
   
-// Invariant opcodes: All instruction sets have these as their low opcodes.
+/// Invariant opcodes: All instruction sets have these as their low opcodes.
 namespace TargetOpcode {
   enum { 
     PHI = 0,
@@ -63,7 +63,7 @@ namespace TargetOpcode {
     /// the copy are emitted with the TargetInstrInfo::copyRegToReg hook.
     COPY_TO_REGCLASS = 10,
     
-    // DBG_VALUE - a mapping of the llvm.dbg.value intrinsic
+    /// DBG_VALUE - a mapping of the llvm.dbg.value intrinsic
     DBG_VALUE = 11
   };
 } // end namespace TargetOpcode
diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h
index 65b60f7a9366a..212cc93401ae1 100644
--- a/include/llvm/Target/TargetRegisterInfo.h
+++ b/include/llvm/Target/TargetRegisterInfo.h
@@ -587,6 +587,17 @@ public:
     return !hasFP(MF);
   }
 
+  /// canSimplifyCallFramePseudos - When possible, it's best to simplify the
+  /// call frame pseudo ops before doing frame index elimination. This is
+  /// possible only when frame index references between the pseudos won't
+  /// need adjusted for the call frame adjustments. Normally, that's true
+  /// if the function has a reserved call frame or a frame pointer. Some
+  /// targets (Thumb2, for example) may have more complicated criteria,
+  /// however, and can override this behavior.
+  virtual bool canSimplifyCallFramePseudos(MachineFunction &MF) const {
+    return hasReservedCallFrame(MF) || hasFP(MF);
+  }
+
   /// hasReservedSpillSlot - Return true if target has reserved a spill slot in
   /// the stack frame of the given function for the specified register. e.g. On
   /// x86, if the frame register is required, the first fixed stack object is
diff --git a/include/llvm/Target/TargetRegistry.h b/include/llvm/Target/TargetRegistry.h
index 37380ab047c48..a409b621af2b8 100644
--- a/include/llvm/Target/TargetRegistry.h
+++ b/include/llvm/Target/TargetRegistry.h
@@ -26,6 +26,7 @@
 namespace llvm {
   class AsmPrinter;
   class Module;
+  class MCAssembler;
   class MCAsmInfo;
   class MCAsmParser;
   class MCCodeEmitter;
@@ -33,6 +34,7 @@ namespace llvm {
   class MCDisassembler;
   class MCInstPrinter;
   class MCStreamer;
+  class TargetAsmBackend;
   class TargetAsmLexer;
   class TargetAsmParser;
   class TargetMachine;
@@ -63,6 +65,8 @@ namespace llvm {
                                             MCContext &Ctx,
                                             MCStreamer &Streamer,
                                             const MCAsmInfo *MAI);
+    typedef TargetAsmBackend *(*AsmBackendCtorTy)(const Target &T,
+                                                  MCAssembler &A);
     typedef TargetAsmLexer *(*AsmLexerCtorTy)(const Target &T,
                                               const MCAsmInfo &MAI);
     typedef TargetAsmParser *(*AsmParserCtorTy)(const Target &T,MCAsmParser &P);
@@ -94,32 +98,35 @@ namespace llvm {
     bool HasJIT;
 
     AsmInfoCtorFnTy AsmInfoCtorFn;
-    
+
     /// TargetMachineCtorFn - Construction function for this target's
     /// TargetMachine, if registered.
     TargetMachineCtorTy TargetMachineCtorFn;
 
-    /// AsmPrinterCtorFn - Construction function for this target's AsmPrinter,
-    /// if registered.
-    AsmPrinterCtorTy AsmPrinterCtorFn;
+    /// AsmBackendCtorFn - Construction function for this target's
+    /// TargetAsmBackend, if registered.
+    AsmBackendCtorTy AsmBackendCtorFn;
 
     /// AsmLexerCtorFn - Construction function for this target's TargetAsmLexer,
     /// if registered.
     AsmLexerCtorTy AsmLexerCtorFn;
-    
+
     /// AsmParserCtorFn - Construction function for this target's
     /// TargetAsmParser, if registered.
     AsmParserCtorTy AsmParserCtorFn;
-    
+
+    /// AsmPrinterCtorFn - Construction function for this target's AsmPrinter,
+    /// if registered.
+    AsmPrinterCtorTy AsmPrinterCtorFn;
+
     /// MCDisassemblerCtorFn - Construction function for this target's
     /// MCDisassembler, if registered.
     MCDisassemblerCtorTy MCDisassemblerCtorFn;
 
-    
-    /// MCInstPrinterCtorFn - Construction function for this target's 
+    /// MCInstPrinterCtorFn - Construction function for this target's
     /// MCInstPrinter, if registered.
     MCInstPrinterCtorTy MCInstPrinterCtorFn;
-    
+
     /// CodeEmitterCtorFn - Construction function for this target's CodeEmitter,
     /// if registered.
     CodeEmitterCtorTy CodeEmitterCtorFn;
@@ -147,12 +154,18 @@ namespace llvm {
     /// hasTargetMachine - Check if this target supports code generation.
     bool hasTargetMachine() const { return TargetMachineCtorFn != 0; }
 
-    /// hasAsmPrinter - Check if this target supports .s printing.
-    bool hasAsmPrinter() const { return AsmPrinterCtorFn != 0; }
+    /// hasAsmBackend - Check if this target supports .o generation.
+    bool hasAsmBackend() const { return AsmBackendCtorFn != 0; }
+
+    /// hasAsmLexer - Check if this target supports .s lexing.
+    bool hasAsmLexer() const { return AsmLexerCtorFn != 0; }
 
     /// hasAsmParser - Check if this target supports .s parsing.
     bool hasAsmParser() const { return AsmParserCtorFn != 0; }
-    
+
+    /// hasAsmPrinter - Check if this target supports .s printing.
+    bool hasAsmPrinter() const { return AsmPrinterCtorFn != 0; }
+
     /// hasMCDisassembler - Check if this target has a disassembler.
     bool hasMCDisassembler() const { return MCDisassemblerCtorFn != 0; }
 
@@ -165,7 +178,7 @@ namespace llvm {
     /// @}
     /// @name Feature Constructors
     /// @{
-    
+
     /// createAsmInfo - Create a MCAsmInfo implementation for the specified
     /// target triple.
     ///
@@ -178,7 +191,7 @@ namespace llvm {
         return 0;
       return AsmInfoCtorFn(*this, Triple);
     }
-    
+
     /// createTargetMachine - Create a target specific machine implementation
     /// for the specified \arg Triple.
     ///
@@ -193,14 +206,13 @@ namespace llvm {
       return TargetMachineCtorFn(*this, Triple, Features);
     }
 
-    /// createAsmPrinter - Create a target specific assembly printer pass.  This
-    /// takes ownership of the MCContext and MCStreamer objects but not the MAI.
-    AsmPrinter *createAsmPrinter(formatted_raw_ostream &OS, TargetMachine &TM,
-                                 MCContext &Ctx, MCStreamer &Streamer,
-                                 const MCAsmInfo *MAI) const {
-      if (!AsmPrinterCtorFn)
+    /// createAsmBackend - Create a target specific assembly parser.
+    ///
+    /// \arg Backend - The target independent assembler object.
+    TargetAsmBackend *createAsmBackend(MCAssembler &Backend) const {
+      if (!AsmBackendCtorFn)
         return 0;
-      return AsmPrinterCtorFn(OS, TM, Ctx, Streamer, MAI);
+      return AsmBackendCtorFn(*this, Backend);
     }
 
     /// createAsmLexer - Create a target specific assembly lexer.
@@ -210,7 +222,7 @@ namespace llvm {
         return 0;
       return AsmLexerCtorFn(*this, MAI);
     }
-    
+
     /// createAsmParser - Create a target specific assembly parser.
     ///
     /// \arg Parser - The target independent parser implementation to use for
@@ -220,7 +232,17 @@ namespace llvm {
         return 0;
       return AsmParserCtorFn(*this, Parser);
     }
-    
+
+    /// createAsmPrinter - Create a target specific assembly printer pass.  This
+    /// takes ownership of the MCContext and MCStreamer objects but not the MAI.
+    AsmPrinter *createAsmPrinter(formatted_raw_ostream &OS, TargetMachine &TM,
+                                 MCContext &Ctx, MCStreamer &Streamer,
+                                 const MCAsmInfo *MAI) const {
+      if (!AsmPrinterCtorFn)
+        return 0;
+      return AsmPrinterCtorFn(OS, TM, Ctx, Streamer, MAI);
+    }
+
     const MCDisassembler *createMCDisassembler() const {
       if (!MCDisassemblerCtorFn)
         return 0;
@@ -234,8 +256,8 @@ namespace llvm {
         return 0;
       return MCInstPrinterCtorFn(*this, SyntaxVariant, MAI, O);
     }
-    
-    
+
+
     /// createCodeEmitter - Create a target specific code emitter.
     MCCodeEmitter *createCodeEmitter(TargetMachine &TM, MCContext &Ctx) const {
       if (!CodeEmitterCtorFn)
@@ -270,8 +292,8 @@ namespace llvm {
         return *this;
       }
       iterator operator++(int) {        // Postincrement
-        iterator tmp = *this; 
-        ++*this; 
+        iterator tmp = *this;
+        ++*this;
         return tmp;
       }
 
@@ -313,7 +335,7 @@ namespace llvm {
 
     /// RegisterTarget - Register the given target. Attempts to register a
     /// target which has already been registered will be ignored.
-    /// 
+    ///
     /// Clients are responsible for ensuring that registration doesn't occur
     /// while another thread is attempting to access the registry. Typically
     /// this is done by initializing all targets at program startup.
@@ -321,7 +343,7 @@ namespace llvm {
     /// @param T - The target being registered.
     /// @param Name - The target name. This should be a static string.
     /// @param ShortDesc - A short target description. This should be a static
-    /// string. 
+    /// string.
     /// @param TQualityFn - The triple match quality computation function for
     /// this target.
     /// @param HasJIT - Whether the target supports JIT code
@@ -334,11 +356,11 @@ namespace llvm {
 
     /// RegisterAsmInfo - Register a MCAsmInfo implementation for the
     /// given target.
-    /// 
+    ///
     /// Clients are responsible for ensuring that registration doesn't occur
     /// while another thread is attempting to access the registry. Typically
     /// this is done by initializing all targets at program startup.
-    /// 
+    ///
     /// @param T - The target being registered.
     /// @param Fn - A function to construct a MCAsmInfo for the target.
     static void RegisterAsmInfo(Target &T, Target::AsmInfoCtorFnTy Fn) {
@@ -346,76 +368,90 @@ namespace llvm {
       if (!T.AsmInfoCtorFn)
         T.AsmInfoCtorFn = Fn;
     }
-    
+
     /// RegisterTargetMachine - Register a TargetMachine implementation for the
     /// given target.
-    /// 
+    ///
     /// Clients are responsible for ensuring that registration doesn't occur
     /// while another thread is attempting to access the registry. Typically
     /// this is done by initializing all targets at program startup.
-    /// 
+    ///
     /// @param T - The target being registered.
     /// @param Fn - A function to construct a TargetMachine for the target.
-    static void RegisterTargetMachine(Target &T, 
+    static void RegisterTargetMachine(Target &T,
                                       Target::TargetMachineCtorTy Fn) {
       // Ignore duplicate registration.
       if (!T.TargetMachineCtorFn)
         T.TargetMachineCtorFn = Fn;
     }
 
-    /// RegisterAsmPrinter - Register an AsmPrinter implementation for the given
-    /// target.
-    /// 
+    /// RegisterAsmBackend - Register a TargetAsmBackend implementation for the
+    /// given target.
+    ///
     /// Clients are responsible for ensuring that registration doesn't occur
     /// while another thread is attempting to access the registry. Typically
     /// this is done by initializing all targets at program startup.
     ///
     /// @param T - The target being registered.
-    /// @param Fn - A function to construct an AsmPrinter for the target.
-    static void RegisterAsmPrinter(Target &T, Target::AsmPrinterCtorTy Fn) {
-      // Ignore duplicate registration.
-      if (!T.AsmPrinterCtorFn)
-        T.AsmPrinterCtorFn = Fn;
+    /// @param Fn - A function to construct an AsmBackend for the target.
+    static void RegisterAsmBackend(Target &T, Target::AsmBackendCtorTy Fn) {
+      if (!T.AsmBackendCtorFn)
+        T.AsmBackendCtorFn = Fn;
     }
 
     /// RegisterAsmLexer - Register a TargetAsmLexer implementation for the
     /// given target.
-    /// 
+    ///
     /// Clients are responsible for ensuring that registration doesn't occur
     /// while another thread is attempting to access the registry. Typically
     /// this is done by initializing all targets at program startup.
     ///
     /// @param T - The target being registered.
-    /// @param Fn - A function to construct an AsmPrinter for the target.
+    /// @param Fn - A function to construct an AsmLexer for the target.
     static void RegisterAsmLexer(Target &T, Target::AsmLexerCtorTy Fn) {
       if (!T.AsmLexerCtorFn)
         T.AsmLexerCtorFn = Fn;
     }
-    
+
     /// RegisterAsmParser - Register a TargetAsmParser implementation for the
     /// given target.
-    /// 
+    ///
     /// Clients are responsible for ensuring that registration doesn't occur
     /// while another thread is attempting to access the registry. Typically
     /// this is done by initializing all targets at program startup.
     ///
     /// @param T - The target being registered.
-    /// @param Fn - A function to construct an AsmPrinter for the target.
+    /// @param Fn - A function to construct an AsmParser for the target.
     static void RegisterAsmParser(Target &T, Target::AsmParserCtorTy Fn) {
       if (!T.AsmParserCtorFn)
         T.AsmParserCtorFn = Fn;
     }
-    
+
+    /// RegisterAsmPrinter - Register an AsmPrinter implementation for the given
+    /// target.
+    ///
+    /// Clients are responsible for ensuring that registration doesn't occur
+    /// while another thread is attempting to access the registry. Typically
+    /// this is done by initializing all targets at program startup.
+    ///
+    /// @param T - The target being registered.
+    /// @param Fn - A function to construct an AsmPrinter for the target.
+    static void RegisterAsmPrinter(Target &T, Target::AsmPrinterCtorTy Fn) {
+      // Ignore duplicate registration.
+      if (!T.AsmPrinterCtorFn)
+        T.AsmPrinterCtorFn = Fn;
+    }
+
     /// RegisterMCDisassembler - Register a MCDisassembler implementation for
     /// the given target.
-    /// 
+    ///
     /// Clients are responsible for ensuring that registration doesn't occur
     /// while another thread is attempting to access the registry. Typically
     /// this is done by initializing all targets at program startup.
     ///
     /// @param T - The target being registered.
     /// @param Fn - A function to construct an MCDisassembler for the target.
-    static void RegisterMCDisassembler(Target &T, 
+    static void RegisterMCDisassembler(Target &T,
                                        Target::MCDisassemblerCtorTy Fn) {
       if (!T.MCDisassemblerCtorFn)
         T.MCDisassemblerCtorFn = Fn;
@@ -423,7 +459,7 @@ namespace llvm {
 
     /// RegisterMCInstPrinter - Register a MCInstPrinter implementation for the
     /// given target.
-    /// 
+    ///
     /// Clients are responsible for ensuring that registration doesn't occur
     /// while another thread is attempting to access the registry. Typically
     /// this is done by initializing all targets at program startup.
@@ -435,7 +471,7 @@ namespace llvm {
       if (!T.MCInstPrinterCtorFn)
         T.MCInstPrinterCtorFn = Fn;
     }
-    
+
     /// RegisterCodeEmitter - Register a MCCodeEmitter implementation for the
     /// given target.
     ///
@@ -444,7 +480,7 @@ namespace llvm {
     /// this is done by initializing all targets at program startup.
     ///
     /// @param T - The target being registered.
-    /// @param Fn - A function to construct an AsmPrinter for the target.
+    /// @param Fn - A function to construct an MCCodeEmitter for the target.
     static void RegisterCodeEmitter(Target &T, Target::CodeEmitterCtorTy Fn) {
       if (!T.CodeEmitterCtorFn)
         T.CodeEmitterCtorFn = Fn;
@@ -498,7 +534,7 @@ namespace llvm {
     static const MCAsmInfo *Allocator(const Target &T, StringRef TT) {
       return new MCAsmInfoImpl(T, TT);
     }
-    
+
   };
 
   /// RegisterAsmInfoFn - Helper template for registering a target assembly info
@@ -537,25 +573,22 @@ namespace llvm {
     }
   };
 
-  /// RegisterAsmPrinter - Helper template for registering a target specific
-  /// assembly printer, for use in the target machine initialization
-  /// function. Usage:
+  /// RegisterAsmBackend - Helper template for registering a target specific
+  /// assembler backend. Usage:
   ///
-  /// extern "C" void LLVMInitializeFooAsmPrinter() {
+  /// extern "C" void LLVMInitializeFooAsmBackend() {
   ///   extern Target TheFooTarget;
-  ///   RegisterAsmPrinter<FooAsmPrinter> X(TheFooTarget);
+  ///   RegisterAsmBackend<FooAsmLexer> X(TheFooTarget);
   /// }
-  template<class AsmPrinterImpl>
-  struct RegisterAsmPrinter {
-    RegisterAsmPrinter(Target &T) {
-      TargetRegistry::RegisterAsmPrinter(T, &Allocator);
+  template<class AsmBackendImpl>
+  struct RegisterAsmBackend {
+    RegisterAsmBackend(Target &T) {
+      TargetRegistry::RegisterAsmBackend(T, &Allocator);
     }
 
   private:
-    static AsmPrinter *Allocator(formatted_raw_ostream &OS, TargetMachine &TM,
-                                 MCContext &Ctx, MCStreamer &Streamer,
-                                 const MCAsmInfo *MAI) {
-      return new AsmPrinterImpl(OS, TM, Ctx, Streamer, MAI);
+    static TargetAsmBackend *Allocator(const Target &T, MCAssembler &Backend) {
+      return new AsmBackendImpl(T, Backend);
     }
   };
 
@@ -572,7 +605,7 @@ namespace llvm {
     RegisterAsmLexer(Target &T) {
       TargetRegistry::RegisterAsmLexer(T, &Allocator);
     }
-    
+
   private:
     static TargetAsmLexer *Allocator(const Target &T, const MCAsmInfo &MAI) {
       return new AsmLexerImpl(T, MAI);
@@ -599,6 +632,28 @@ namespace llvm {
     }
   };
 
+  /// RegisterAsmPrinter - Helper template for registering a target specific
+  /// assembly printer, for use in the target machine initialization
+  /// function. Usage:
+  ///
+  /// extern "C" void LLVMInitializeFooAsmPrinter() {
+  ///   extern Target TheFooTarget;
+  ///   RegisterAsmPrinter<FooAsmPrinter> X(TheFooTarget);
+  /// }
+  template<class AsmPrinterImpl>
+  struct RegisterAsmPrinter {
+    RegisterAsmPrinter(Target &T) {
+      TargetRegistry::RegisterAsmPrinter(T, &Allocator);
+    }
+
+  private:
+    static AsmPrinter *Allocator(formatted_raw_ostream &OS, TargetMachine &TM,
+                                 MCContext &Ctx, MCStreamer &Streamer,
+                                 const MCAsmInfo *MAI) {
+      return new AsmPrinterImpl(OS, TM, Ctx, Streamer, MAI);
+    }
+  };
+
   /// RegisterCodeEmitter - Helper template for registering a target specific
   /// machine code emitter, for use in the target initialization
   /// function. Usage:
diff --git a/include/llvm/Target/TargetSelectionDAG.td b/include/llvm/Target/TargetSelectionDAG.td
index 4b72f81eb1e8d..4365d332c044d 100644
--- a/include/llvm/Target/TargetSelectionDAG.td
+++ b/include/llvm/Target/TargetSelectionDAG.td
@@ -479,7 +479,6 @@ class PatLeaf<dag frag, code pred = [{}], SDNodeXForm xform = NOOP_SDNodeXForm>
 def vtInt      : PatLeaf<(vt),  [{ return N->getVT().isInteger(); }]>;
 def vtFP       : PatLeaf<(vt),  [{ return N->getVT().isFloatingPoint(); }]>;
 
-def immAllOnes : PatLeaf<(imm), [{ return N->isAllOnesValue(); }]>;
 def immAllOnesV: PatLeaf<(build_vector), [{
   return ISD::isBuildVectorAllOnes(N);
 }]>;
@@ -496,7 +495,7 @@ def immAllZerosV_bc: PatLeaf<(bitconvert), [{
 
 
 // Other helper fragments.
-def not  : PatFrag<(ops node:$in), (xor node:$in, immAllOnes)>;
+def not  : PatFrag<(ops node:$in), (xor node:$in, -1)>;
 def vnot : PatFrag<(ops node:$in), (xor node:$in, immAllOnesV)>;
 def vnot_conv : PatFrag<(ops node:$in), (xor node:$in, immAllOnesV_bc)>;
 def ineg : PatFrag<(ops node:$in), (sub 0, node:$in)>;