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authorDimitry Andric <dim@FreeBSD.org>2016-02-13 14:57:10 +0000
committerDimitry Andric <dim@FreeBSD.org>2016-02-13 14:57:10 +0000
commita322a4af1fe8b989fe5d1bbc15de8736a26c03ca (patch)
tree0daaa3c98a8029d259c5918dfa1c13c9d4fe7971 /lib/Target/AArch64/AArch64ISelLowering.cpp
parentaff3ef6f6ccad9bd4e082546f8161727c2019117 (diff)
Notes
Diffstat (limited to 'lib/Target/AArch64/AArch64ISelLowering.cpp')
-rw-r--r--lib/Target/AArch64/AArch64ISelLowering.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp
index 9b73c5e9d952f..92cf1cd71970b 100644
--- a/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -6689,6 +6689,9 @@ SDValue AArch64TargetLowering::LowerVSETCC(SDValue Op,
return DAG.getSExtOrTrunc(Cmp, dl, Op.getValueType());
}
+ if (LHS.getValueType().getVectorElementType() == MVT::f16)
+ return SDValue();
+
assert(LHS.getValueType().getVectorElementType() == MVT::f32 ||
LHS.getValueType().getVectorElementType() == MVT::f64);