diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2018-02-02 17:07:53 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2018-02-02 17:07:53 +0000 |
| commit | 6d18171c1901a4db5d3e757a5ba4737fe8789dec (patch) | |
| tree | 6adfbc90504e1005368a826374523b46773e1599 /lib/Target/X86/X86TargetMachine.cpp | |
| parent | 4a6a1ccbecd7e34f40b05b4ba0a05d0031dd1eff (diff) | |
Notes
Diffstat (limited to 'lib/Target/X86/X86TargetMachine.cpp')
| -rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index e95e6ecae091c..ac242e1c00e04 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -321,6 +321,7 @@ public: void addPreRegAlloc() override; void addPostRegAlloc() override; void addPreEmitPass() override; + void addPreEmitPass2() override; void addPreSched2() override; }; @@ -350,6 +351,11 @@ void X86PassConfig::addIRPasses() { if (TM->getOptLevel() != CodeGenOpt::None) addPass(createInterleavedAccessPass()); + + // Add passes that handle indirect branch removal and insertion of a retpoline + // thunk. These will be a no-op unless a function subtarget has the retpoline + // feature enabled. + addPass(createIndirectBrExpandPass()); } bool X86PassConfig::addInstSelector() { @@ -436,3 +442,7 @@ void X86PassConfig::addPreEmitPass() { addPass(createX86EvexToVexInsts()); } } + +void X86PassConfig::addPreEmitPass2() { + addPass(createX86RetpolineThunksPass()); +} |
