diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2020-01-17 20:45:01 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-01-17 20:45:01 +0000 |
| commit | 706b4fc47bbc608932d3b491ae19a3b9cde9497b (patch) | |
| tree | 4adf86a776049cbf7f69a1929c4babcbbef925eb /llvm/lib/Target/Mips/Mips.td | |
| parent | 7cc9cf2bf09f069cb2dd947ead05d0b54301fb71 (diff) | |
Notes
Diffstat (limited to 'llvm/lib/Target/Mips/Mips.td')
| -rw-r--r-- | llvm/lib/Target/Mips/Mips.td | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/llvm/lib/Target/Mips/Mips.td b/llvm/lib/Target/Mips/Mips.td index a5908362e81f1..b8a69815cc129 100644 --- a/llvm/lib/Target/Mips/Mips.td +++ b/llvm/lib/Target/Mips/Mips.td @@ -192,17 +192,22 @@ def FeatureGINV : SubtargetFeature<"ginv", "HasGINV", "true", def FeatureMicroMips : SubtargetFeature<"micromips", "InMicroMipsMode", "true", "microMips mode">; -def FeatureCnMips : SubtargetFeature<"cnmips", "HasCnMips", - "true", "Octeon cnMIPS Support", - [FeatureMips64r2]>; +def FeatureCnMips : SubtargetFeature<"cnmips", "HasCnMips", + "true", "Octeon cnMIPS Support", + [FeatureMips64r2]>; + +def FeatureCnMipsP : SubtargetFeature<"cnmipsp", "HasCnMipsP", + "true", "Octeon+ cnMIPS Support", + [FeatureCnMips]>; def FeatureUseTCCInDIV : SubtargetFeature< "use-tcc-in-div", "UseTCCInDIV", "false", "Force the assembler to use trapping">; -def FeatureMadd4 : SubtargetFeature<"nomadd4", "DisableMadd4", "true", - "Disable 4-operand madd.fmt and related instructions">; +def FeatureMadd4 + : SubtargetFeature<"nomadd4", "DisableMadd4", "true", + "Disable 4-operand madd.fmt and related instructions">; def FeatureMT : SubtargetFeature<"mt", "HasMT", "true", "Mips MT ASE">; @@ -227,6 +232,7 @@ def ImplP5600 : SubtargetFeature<"p5600", "ProcImpl", class Proc<string Name, list<SubtargetFeature> Features> : ProcessorModel<Name, MipsGenericModel, Features>; +def : Proc<"generic", [FeatureMips32]>; def : Proc<"mips1", [FeatureMips1]>; def : Proc<"mips2", [FeatureMips2]>; def : Proc<"mips32", [FeatureMips32]>; @@ -244,6 +250,7 @@ def : Proc<"mips64r3", [FeatureMips64r3]>; def : Proc<"mips64r5", [FeatureMips64r5]>; def : Proc<"mips64r6", [FeatureMips64r6]>; def : Proc<"octeon", [FeatureMips64r2, FeatureCnMips]>; +def : Proc<"octeon+", [FeatureMips64r2, FeatureCnMips, FeatureCnMipsP]>; def : ProcessorModel<"p5600", MipsP5600Model, [ImplP5600]>; def MipsAsmParser : AsmParser { |