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authorEmmanuel Vadot <manu@FreeBSD.org>2018-04-20 18:44:52 +0000
committerEmmanuel Vadot <manu@FreeBSD.org>2018-04-20 18:44:52 +0000
commit29087c4e73c74afd082d107f4cdd648f5c3169ec (patch)
tree64e25ca30c2072519bf087c4f6d56b46644e62d2 /src/arm64/sprd/whale2.dtsi
parent16ae49e2bea5badc71c2265966ec2a9b0ba541dc (diff)
Notes
Diffstat (limited to 'src/arm64/sprd/whale2.dtsi')
-rw-r--r--src/arm64/sprd/whale2.dtsi62
1 files changed, 60 insertions, 2 deletions
diff --git a/src/arm64/sprd/whale2.dtsi b/src/arm64/sprd/whale2.dtsi
index 7c217c547f859..328009c4638c1 100644
--- a/src/arm64/sprd/whale2.dtsi
+++ b/src/arm64/sprd/whale2.dtsi
@@ -17,6 +17,51 @@
#size-cells = <2>;
ranges;
+ ap_ahb_regs: syscon@20210000 {
+ compatible = "syscon";
+ reg = <0 0x20210000 0 0x10000>;
+ };
+
+ pmu_regs: syscon@402b0000 {
+ compatible = "syscon";
+ reg = <0 0x402b0000 0 0x10000>;
+ };
+
+ aon_regs: syscon@402e0000 {
+ compatible = "syscon";
+ reg = <0 0x402e0000 0 0x10000>;
+ };
+
+ ana_regs: syscon@40400000 {
+ compatible = "syscon";
+ reg = <0 0x40400000 0 0x10000>;
+ };
+
+ agcp_regs: syscon@415e0000 {
+ compatible = "syscon";
+ reg = <0 0x415e0000 0 0x1000000>;
+ };
+
+ vsp_regs: syscon@61100000 {
+ compatible = "syscon";
+ reg = <0 0x61100000 0 0x10000>;
+ };
+
+ cam_regs: syscon@62100000 {
+ compatible = "syscon";
+ reg = <0 0x62100000 0 0x10000>;
+ };
+
+ disp_regs: syscon@63100000 {
+ compatible = "syscon";
+ reg = <0 0x63100000 0 0x10000>;
+ };
+
+ ap_apb_regs: syscon@70b00000 {
+ compatible = "syscon";
+ reg = <0 0x70b00000 0 0x40000>;
+ };
+
ap-apb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -59,13 +104,26 @@
status = "disabled";
};
};
+ };
+ ext_32k: ext_32k {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "ext-32k";
};
- ext_26m: ext-26m {
+ ext_26m: ext_26m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
- clock-output-names = "ext_26m";
+ clock-output-names = "ext-26m";
+ };
+
+ ext_rco_100m: ext_rco_100m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "ext-rco-100m";
};
};