diff options
| author | Ruslan Bukin <br@FreeBSD.org> | 2016-11-17 15:08:30 +0000 |
|---|---|---|
| committer | Ruslan Bukin <br@FreeBSD.org> | 2016-11-17 15:08:30 +0000 |
| commit | cec8009ca15c0c3112e4ed4475d4deaa8d175ecf (patch) | |
| tree | efeb424c658152b507b398f02ab09473b45f555a /sys/dev/usb/controller | |
| parent | a8d695428109f4094ea3112bd44933219f8e678d (diff) | |
Notes
Diffstat (limited to 'sys/dev/usb/controller')
| -rw-r--r-- | sys/dev/usb/controller/dwc_otg.c | 27 | ||||
| -rw-r--r-- | sys/dev/usb/controller/dwc_otg.h | 7 |
2 files changed, 26 insertions, 8 deletions
diff --git a/sys/dev/usb/controller/dwc_otg.c b/sys/dev/usb/controller/dwc_otg.c index 5560f070dc962..08c037706eacb 100644 --- a/sys/dev/usb/controller/dwc_otg.c +++ b/sys/dev/usb/controller/dwc_otg.c @@ -98,10 +98,6 @@ GINTSTS_WKUPINT | GINTSTS_USBSUSP | GINTMSK_OTGINTMSK | \ GINTSTS_SESSREQINT) -#define DWC_OTG_PHY_ULPI 0 -#define DWC_OTG_PHY_HSIC 1 -#define DWC_OTG_PHY_INTERNAL 2 - #ifndef DWC_OTG_PHY_DEFAULT #define DWC_OTG_PHY_DEFAULT DWC_OTG_PHY_ULPI #endif @@ -110,10 +106,10 @@ static int dwc_otg_phy_type = DWC_OTG_PHY_DEFAULT; static SYSCTL_NODE(_hw_usb, OID_AUTO, dwc_otg, CTLFLAG_RW, 0, "USB DWC OTG"); SYSCTL_INT(_hw_usb_dwc_otg, OID_AUTO, phy_type, CTLFLAG_RDTUN, - &dwc_otg_phy_type, 0, "DWC OTG PHY TYPE - 0/1/2 - ULPI/HSIC/INTERNAL"); + &dwc_otg_phy_type, 0, "DWC OTG PHY TYPE - 0/1/2/3 - ULPI/HSIC/INTERNAL/UTMI+"); #ifdef USB_DEBUG -static int dwc_otg_debug; +static int dwc_otg_debug = 0; SYSCTL_INT(_hw_usb_dwc_otg, OID_AUTO, debug, CTLFLAG_RWTUN, &dwc_otg_debug, 0, "DWC OTG debug level"); @@ -3889,8 +3885,13 @@ dwc_otg_init(struct dwc_otg_softc *sc) break; } - /* select HSIC, ULPI or internal PHY mode */ - switch (dwc_otg_phy_type) { + if (sc->sc_phy_type == 0) + sc->sc_phy_type = dwc_otg_phy_type + 1; + if (sc->sc_phy_bits == 0) + sc->sc_phy_bits = 16; + + /* select HSIC, ULPI, UTMI+ or internal PHY mode */ + switch (sc->sc_phy_type) { case DWC_OTG_PHY_HSIC: DWC_OTG_WRITE_4(sc, DOTG_GUSBCFG, GUSBCFG_PHYIF | @@ -3914,6 +3915,16 @@ dwc_otg_init(struct dwc_otg_softc *sc) DWC_OTG_WRITE_4(sc, DOTG_GLPMCFG, temp & ~GLPMCFG_HSIC_CONN); break; + case DWC_OTG_PHY_UTMI: + DWC_OTG_WRITE_4(sc, DOTG_GUSBCFG, + (sc->sc_phy_bits == 16 ? GUSBCFG_PHYIF : 0) | + GUSBCFG_TRD_TIM_SET(5) | temp); + DWC_OTG_WRITE_4(sc, DOTG_GOTGCTL, 0); + + temp = DWC_OTG_READ_4(sc, DOTG_GLPMCFG); + DWC_OTG_WRITE_4(sc, DOTG_GLPMCFG, + temp & ~GLPMCFG_HSIC_CONN); + break; case DWC_OTG_PHY_INTERNAL: DWC_OTG_WRITE_4(sc, DOTG_GUSBCFG, GUSBCFG_PHYSEL | diff --git a/sys/dev/usb/controller/dwc_otg.h b/sys/dev/usb/controller/dwc_otg.h index 038b072aeef70..7f5ede481e588 100644 --- a/sys/dev/usb/controller/dwc_otg.h +++ b/sys/dev/usb/controller/dwc_otg.h @@ -191,6 +191,13 @@ struct dwc_otg_softc { uint16_t sc_active_rx_ep; uint16_t sc_last_frame_num; + uint8_t sc_phy_type; + uint8_t sc_phy_bits; +#define DWC_OTG_PHY_ULPI 1 +#define DWC_OTG_PHY_HSIC 2 +#define DWC_OTG_PHY_INTERNAL 3 +#define DWC_OTG_PHY_UTMI 4 + uint8_t sc_timer_active; uint8_t sc_dev_ep_max; uint8_t sc_dev_in_ep_max; |
