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authorKonstantin Belousov <kib@FreeBSD.org>2020-10-14 22:57:50 +0000
committerKonstantin Belousov <kib@FreeBSD.org>2020-10-14 22:57:50 +0000
commitd3ba71b2b1abc77d1625d693191d7f6d2fcfc5cb (patch)
treeec13d5ab9620a46e693f310793c531da146e800f /sys/i386
parent6f3b523c9a576029433f8649a9b6efd2c34604f7 (diff)
Notes
Diffstat (limited to 'sys/i386')
-rw-r--r--sys/i386/i386/initcpu.c12
-rw-r--r--sys/i386/i386/machdep.c2
2 files changed, 10 insertions, 4 deletions
diff --git a/sys/i386/i386/initcpu.c b/sys/i386/i386/initcpu.c
index a853e498d0561..9ba269af2b32e 100644
--- a/sys/i386/i386/initcpu.c
+++ b/sys/i386/i386/initcpu.c
@@ -720,8 +720,8 @@ initializecpu(void)
break;
}
break;
-#ifdef CPU_ATHLON_SSE_HACK
case CPU_VENDOR_AMD:
+#ifdef CPU_ATHLON_SSE_HACK
/*
* Sometimes the BIOS doesn't enable SSE instructions.
* According to AMD document 20734, the mobile
@@ -738,8 +738,16 @@ initializecpu(void)
do_cpuid(1, regs);
cpu_feature = regs[3];
}
- break;
#endif
+ /*
+ * Detect C1E that breaks APIC. See comment in
+ * amd64/initcpu.c.
+ */
+ if ((CPUID_TO_FAMILY(cpu_id) == 0xf ||
+ CPUID_TO_FAMILY(cpu_id) == 0x10) &&
+ (cpu_feature2 & CPUID2_HV) == 0)
+ cpu_amdc1e_bug = 1;
+ break;
case CPU_VENDOR_CENTAUR:
init_via();
break;
diff --git a/sys/i386/i386/machdep.c b/sys/i386/i386/machdep.c
index b961a8f41b6c0..e847d97b8bcff 100644
--- a/sys/i386/i386/machdep.c
+++ b/sys/i386/i386/machdep.c
@@ -2505,8 +2505,6 @@ init386(int first)
thread0.td_pcb->pcb_ext = 0;
thread0.td_frame = &proc0_tf;
- cpu_probe_amdc1e();
-
#ifdef FDT
x86_init_fdt();
#endif