vendor/llvm/llvm-trunk-r321017

1 files changed, 158 insertions, 147 deletions

diff --git a/test/CodeGen/AArch64/GlobalISel/select-load.mir b/test/CodeGen/AArch64/GlobalISel/select-load.mir
index d00b98d148be5..5c030f931dde1 100644
--- a/test/CodeGen/AArch64/GlobalISel/select-load.mir
+++ b/test/CodeGen/AArch64/GlobalISel/select-load.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s
 
 --- |
@@ -28,117 +29,108 @@
   define void @load_gep_64_s16_fpr(i16* %addr) { ret void }
   define void @load_gep_32_s8_fpr(i8* %addr) { ret void }
 
+  define void @load_v2s32(i64 *%addr) { ret void }
+
+  define void @sextload_s32_from_s16(i16 *%addr) { ret void }
+  define void @zextload_s32_from_s16(i16 *%addr) { ret void }
+  define void @aextload_s32_from_s16(i16 *%addr) { ret void }
 ...
 
 ---
-# CHECK-LABEL: name: load_s64_gpr
 name:            load_s64_gpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr64, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %1 = LDRXui %0, 0 :: (load 8 from %ir.addr)
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_s64_gpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui [[COPY]], 0 :: (load 8 from %ir.addr)
+    ; CHECK: %x0 = COPY [[LDRXui]]
     %0(p0) = COPY %x0
     %1(s64) = G_LOAD  %0 :: (load 8 from %ir.addr)
     %x0 = COPY %1(s64)
 ...
 
 ---
-# CHECK-LABEL: name: load_s32_gpr
 name:            load_s32_gpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr32, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %1 = LDRWui %0, 0 :: (load 4 from %ir.addr)
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_s32_gpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load 4 from %ir.addr)
+    ; CHECK: %w0 = COPY [[LDRWui]]
     %0(p0) = COPY %x0
     %1(s32) = G_LOAD  %0 :: (load 4 from %ir.addr)
     %w0 = COPY %1(s32)
 ...
 
 ---
-# CHECK-LABEL: name: load_s16_gpr
 name:            load_s16_gpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr32, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %1 = LDRHHui %0, 0 :: (load 2 from %ir.addr)
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_s16_gpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load 2 from %ir.addr)
+    ; CHECK: %w0 = COPY [[LDRHHui]]
     %0(p0) = COPY %x0
     %1(s16) = G_LOAD  %0 :: (load 2 from %ir.addr)
-    %w0 = COPY %1(s16)
+    %2:gpr(s32) = G_ANYEXT %1
+    %w0 = COPY %2(s32)
 ...
 
 ---
-# CHECK-LABEL: name: load_s8_gpr
 name:            load_s8_gpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr32, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %1 = LDRBBui %0, 0 :: (load 1 from %ir.addr)
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_s8_gpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[COPY]], 0 :: (load 1 from %ir.addr)
+    ; CHECK: %w0 = COPY [[LDRBBui]]
     %0(p0) = COPY %x0
     %1(s8) = G_LOAD  %0 :: (load 1 from %ir.addr)
-    %w0 = COPY %1(s8)
+    %2:gpr(s32) = G_ANYEXT %1
+    %w0 = COPY %2(s32)
 ...
 
 ---
-# CHECK-LABEL: name: load_fi_s64_gpr
 name:            load_fi_s64_gpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr64, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
@@ -146,43 +138,37 @@ registers:
 stack:
   - { id: 0, name: ptr0, offset: 0, size: 8, alignment: 8 }
 
-# CHECK:  body:
-# CHECK: %1 = LDRXui %stack.0.ptr0, 0 :: (load 8)
-# CHECK: %x0 = COPY %1
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_fi_s64_gpr
+    ; CHECK: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui %stack.0.ptr0, 0 :: (load 8)
+    ; CHECK: %x0 = COPY [[LDRXui]]
     %0(p0) = G_FRAME_INDEX %stack.0.ptr0
     %1(s64) = G_LOAD %0 :: (load 8)
     %x0 = COPY %1(s64)
 ...
 
 ---
-# CHECK-LABEL: name: load_gep_128_s64_gpr
 name:            load_gep_128_s64_gpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 2, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 3, class: gpr64, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
   - { id: 2, class: gpr }
   - { id: 3, class: gpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %3 = LDRXui %0, 16 :: (load 8 from %ir.addr)
-# CHECK: %x0 = COPY %3
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_gep_128_s64_gpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui [[COPY]], 16 :: (load 8 from %ir.addr)
+    ; CHECK: %x0 = COPY [[LDRXui]]
     %0(p0) = COPY %x0
     %1(s64) = G_CONSTANT i64 128
     %2(p0) = G_GEP %0, %1
@@ -191,30 +177,24 @@ body:             |
 ...
 
 ---
-# CHECK-LABEL: name: load_gep_512_s32_gpr
 name:            load_gep_512_s32_gpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 2, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 3, class: gpr32, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
   - { id: 2, class: gpr }
   - { id: 3, class: gpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %3 = LDRWui %0, 128 :: (load 4 from %ir.addr)
-# CHECK: %w0 = COPY %3
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_gep_512_s32_gpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 128 :: (load 4 from %ir.addr)
+    ; CHECK: %w0 = COPY [[LDRWui]]
     %0(p0) = COPY %x0
     %1(s64) = G_CONSTANT i64 512
     %2(p0) = G_GEP %0, %1
@@ -223,194 +203,166 @@ body:             |
 ...
 
 ---
-# CHECK-LABEL: name: load_gep_64_s16_gpr
 name:            load_gep_64_s16_gpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 2, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 3, class: gpr32, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
   - { id: 2, class: gpr }
   - { id: 3, class: gpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %3 = LDRHHui %0, 32 :: (load 2 from %ir.addr)
-# CHECK: %w0 = COPY %3
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_gep_64_s16_gpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 32 :: (load 2 from %ir.addr)
+    ; CHECK: %w0 = COPY [[LDRHHui]]
     %0(p0) = COPY %x0
     %1(s64) = G_CONSTANT i64 64
     %2(p0) = G_GEP %0, %1
     %3(s16) = G_LOAD %2 :: (load 2 from %ir.addr)
-    %w0 = COPY %3
+    %4:gpr(s32) = G_ANYEXT %3
+    %w0 = COPY %4
 ...
 
 ---
-# CHECK-LABEL: name: load_gep_1_s8_gpr
 name:            load_gep_1_s8_gpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 2, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 3, class: gpr32, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
   - { id: 2, class: gpr }
   - { id: 3, class: gpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %3 = LDRBBui %0, 1 :: (load 1 from %ir.addr)
-# CHECK: %w0 = COPY %3
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_gep_1_s8_gpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[COPY]], 1 :: (load 1 from %ir.addr)
+    ; CHECK: %w0 = COPY [[LDRBBui]]
     %0(p0) = COPY %x0
     %1(s64) = G_CONSTANT i64 1
     %2(p0) = G_GEP %0, %1
     %3(s8) = G_LOAD %2 :: (load 1 from %ir.addr)
-    %w0 = COPY %3
+    %4:gpr(s32) = G_ANYEXT %3
+    %w0 = COPY %4
 ...
 
 ---
-# CHECK-LABEL: name: load_s64_fpr
 name:            load_s64_fpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: fpr64, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: fpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %1 = LDRDui %0, 0 :: (load 8 from %ir.addr)
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_s64_fpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[COPY]], 0 :: (load 8 from %ir.addr)
+    ; CHECK: %d0 = COPY [[LDRDui]]
     %0(p0) = COPY %x0
     %1(s64) = G_LOAD  %0 :: (load 8 from %ir.addr)
     %d0 = COPY %1(s64)
 ...
 
 ---
-# CHECK-LABEL: name: load_s32_fpr
 name:            load_s32_fpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: fpr32, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: fpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %1 = LDRSui %0, 0 :: (load 4 from %ir.addr)
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_s32_fpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRSui:%[0-9]+]]:fpr32 = LDRSui [[COPY]], 0 :: (load 4 from %ir.addr)
+    ; CHECK: %s0 = COPY [[LDRSui]]
     %0(p0) = COPY %x0
     %1(s32) = G_LOAD  %0 :: (load 4 from %ir.addr)
     %s0 = COPY %1(s32)
 ...
 
 ---
-# CHECK-LABEL: name: load_s16_fpr
 name:            load_s16_fpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: fpr16, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: fpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %1 = LDRHui %0, 0 :: (load 2 from %ir.addr)
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_s16_fpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRHui:%[0-9]+]]:fpr16 = LDRHui [[COPY]], 0 :: (load 2 from %ir.addr)
+    ; CHECK: %h0 = COPY [[LDRHui]]
     %0(p0) = COPY %x0
     %1(s16) = G_LOAD  %0 :: (load 2 from %ir.addr)
     %h0 = COPY %1(s16)
 ...
 
 ---
-# CHECK-LABEL: name: load_s8_fpr
 name:            load_s8_fpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: fpr8, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: fpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %1 = LDRBui %0, 0 :: (load 1 from %ir.addr)
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_s8_fpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRBui:%[0-9]+]]:fpr8 = LDRBui [[COPY]], 0 :: (load 1 from %ir.addr)
+    ; CHECK: %b0 = COPY [[LDRBui]]
     %0(p0) = COPY %x0
     %1(s8) = G_LOAD  %0 :: (load 1 from %ir.addr)
     %b0 = COPY %1(s8)
 ...
 
 ---
-# CHECK-LABEL: name: load_gep_8_s64_fpr
 name:            load_gep_8_s64_fpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 2, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 3, class: fpr64, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
   - { id: 2, class: gpr }
   - { id: 3, class: fpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %3 = LDRDui %0, 1 :: (load 8 from %ir.addr)
-# CHECK: %d0 = COPY %3
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_gep_8_s64_fpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[COPY]], 1 :: (load 8 from %ir.addr)
+    ; CHECK: %d0 = COPY [[LDRDui]]
     %0(p0) = COPY %x0
     %1(s64) = G_CONSTANT i64 8
     %2(p0) = G_GEP %0, %1
@@ -419,30 +371,24 @@ body:             |
 ...
 
 ---
-# CHECK-LABEL: name: load_gep_16_s32_fpr
 name:            load_gep_16_s32_fpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 2, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 3, class: fpr32, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
   - { id: 2, class: gpr }
   - { id: 3, class: fpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %3 = LDRSui %0, 4 :: (load 4 from %ir.addr)
-# CHECK: %s0 = COPY %3
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_gep_16_s32_fpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRSui:%[0-9]+]]:fpr32 = LDRSui [[COPY]], 4 :: (load 4 from %ir.addr)
+    ; CHECK: %s0 = COPY [[LDRSui]]
     %0(p0) = COPY %x0
     %1(s64) = G_CONSTANT i64 16
     %2(p0) = G_GEP %0, %1
@@ -451,30 +397,24 @@ body:             |
 ...
 
 ---
-# CHECK-LABEL: name: load_gep_64_s16_fpr
 name:            load_gep_64_s16_fpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 2, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 3, class: fpr16, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
   - { id: 2, class: gpr }
   - { id: 3, class: fpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %3 = LDRHui %0, 32 :: (load 2 from %ir.addr)
-# CHECK: %h0 = COPY %3
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_gep_64_s16_fpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRHui:%[0-9]+]]:fpr16 = LDRHui [[COPY]], 32 :: (load 2 from %ir.addr)
+    ; CHECK: %h0 = COPY [[LDRHui]]
     %0(p0) = COPY %x0
     %1(s64) = G_CONSTANT i64 64
     %2(p0) = G_GEP %0, %1
@@ -483,33 +423,104 @@ body:             |
 ...
 
 ---
-# CHECK-LABEL: name: load_gep_32_s8_fpr
 name:            load_gep_32_s8_fpr
 legalized:       true
 regBankSelected: true
 
-# CHECK:      registers:
-# CHECK-NEXT:  - { id: 0, class: gpr64sp, preferred-register: '' }
-# CHECK-NEXT:  - { id: 1, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 2, class: gpr, preferred-register: '' }
-# CHECK-NEXT:  - { id: 3, class: fpr8, preferred-register: '' }
 registers:
   - { id: 0, class: gpr }
   - { id: 1, class: gpr }
   - { id: 2, class: gpr }
   - { id: 3, class: fpr }
 
-# CHECK:  body:
-# CHECK: %0 = COPY %x0
-# CHECK: %3 = LDRBui %0, 32 :: (load 1 from %ir.addr)
-# CHECK: %b0 = COPY %3
 body:             |
   bb.0:
     liveins: %x0
 
+    ; CHECK-LABEL: name: load_gep_32_s8_fpr
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRBui:%[0-9]+]]:fpr8 = LDRBui [[COPY]], 32 :: (load 1 from %ir.addr)
+    ; CHECK: %b0 = COPY [[LDRBui]]
     %0(p0) = COPY %x0
     %1(s64) = G_CONSTANT i64 32
     %2(p0) = G_GEP %0, %1
     %3(s8) = G_LOAD %2 :: (load 1 from %ir.addr)
     %b0 = COPY %3
 ...
+---
+name:            load_v2s32
+legalized:       true
+regBankSelected: true
+
+registers:
+  - { id: 0, class: gpr }
+  - { id: 1, class: fpr }
+
+body:             |
+  bb.0:
+    liveins: %x0
+
+    ; CHECK-LABEL: name: load_v2s32
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[COPY]], 0 :: (load 8 from %ir.addr)
+    ; CHECK: %d0 = COPY [[LDRDui]]
+    %0(p0) = COPY %x0
+    %1(<2 x s32>) = G_LOAD %0 :: (load 8 from %ir.addr)
+    %d0 = COPY %1(<2 x s32>)
+...
+---
+name:            sextload_s32_from_s16
+legalized:       true
+regBankSelected: true
+
+body:             |
+  bb.0:
+    liveins: %w0
+
+    ; CHECK-LABEL: name: sextload_s32_from_s16
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[T0:%[0-9]+]]:gpr32 = LDRSHWui [[COPY]], 0 :: (load 2 from %ir.addr)
+    ; CHECK: %w0 = COPY [[T0]]
+    %0:gpr(p0) = COPY %x0
+    %1:gpr(s16) = G_LOAD %0 :: (load 2 from %ir.addr)
+    %2:gpr(s32) = G_SEXT %1
+    %w0 = COPY %2(s32)
+...
+
+---
+name:            zextload_s32_from_s16
+legalized:       true
+regBankSelected: true
+
+body:             |
+  bb.0:
+    liveins: %w0
+
+    ; CHECK-LABEL: name: zextload_s32_from_s16
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[T0:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load 2 from %ir.addr)
+    ; CHECK: %w0 = COPY [[T0]]
+    %0:gpr(p0) = COPY %x0
+    %1:gpr(s16) = G_LOAD %0 :: (load 2 from %ir.addr)
+    %2:gpr(s32) = G_ZEXT %1
+    %w0 = COPY %2(s32)
+...
+
+---
+name:            aextload_s32_from_s16
+legalized:       true
+regBankSelected: true
+
+body:             |
+  bb.0:
+    liveins: %w0
+
+    ; CHECK-LABEL: name: aextload_s32_from_s16
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY %x0
+    ; CHECK: [[T0:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load 2 from %ir.addr)
+    ; CHECK: %w0 = COPY [[T0]]
+    %0:gpr(p0) = COPY %x0
+    %1:gpr(s16) = G_LOAD %0 :: (load 2 from %ir.addr)
+    %2:gpr(s32) = G_ANYEXT %1
+    %w0 = COPY %2(s32)
+...