diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2013-12-22 00:04:03 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2013-12-22 00:04:03 +0000 |
| commit | f8af5cf600354830d4ccf59732403f0f073eccb9 (patch) | |
| tree | 2ba0398b4c42ad4f55561327538044fd2c925a8b /test/CodeGen/X86/fast-isel-divrem.ll | |
| parent | 59d6cff90eecf31cb3dd860c4e786674cfdd42eb (diff) | |
Notes
Diffstat (limited to 'test/CodeGen/X86/fast-isel-divrem.ll')
| -rw-r--r-- | test/CodeGen/X86/fast-isel-divrem.ll | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/test/CodeGen/X86/fast-isel-divrem.ll b/test/CodeGen/X86/fast-isel-divrem.ll index 7aba7f7b79530..5828becb3c338 100644 --- a/test/CodeGen/X86/fast-isel-divrem.ll +++ b/test/CodeGen/X86/fast-isel-divrem.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s -; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s define i8 @test_sdiv8(i8 %dividend, i8 %divisor) nounwind { entry: @@ -7,7 +7,7 @@ entry: ret i8 %result } -; CHECK: test_sdiv8: +; CHECK-LABEL: test_sdiv8: ; CHECK: movsbw ; CHECK: idivb @@ -17,7 +17,7 @@ entry: ret i8 %result } -; CHECK: test_srem8: +; CHECK-LABEL: test_srem8: ; CHECK: movsbw ; CHECK: idivb @@ -27,7 +27,7 @@ entry: ret i8 %result } -; CHECK: test_udiv8: +; CHECK-LABEL: test_udiv8: ; CHECK: movzbw ; CHECK: divb @@ -37,7 +37,7 @@ entry: ret i8 %result } -; CHECK: test_urem8: +; CHECK-LABEL: test_urem8: ; CHECK: movzbw ; CHECK: divb @@ -47,7 +47,7 @@ entry: ret i16 %result } -; CHECK: test_sdiv16: +; CHECK-LABEL: test_sdiv16: ; CHECK: cwtd ; CHECK: idivw @@ -57,7 +57,7 @@ entry: ret i16 %result } -; CHECK: test_srem16: +; CHECK-LABEL: test_srem16: ; CHECK: cwtd ; CHECK: idivw @@ -67,7 +67,7 @@ entry: ret i16 %result } -; CHECK: test_udiv16: +; CHECK-LABEL: test_udiv16: ; CHECK: xorl ; CHECK: divw @@ -77,7 +77,7 @@ entry: ret i16 %result } -; CHECK: test_urem16: +; CHECK-LABEL: test_urem16: ; CHECK: xorl ; CHECK: divw @@ -87,7 +87,7 @@ entry: ret i32 %result } -; CHECK: test_sdiv32: +; CHECK-LABEL: test_sdiv32: ; CHECK: cltd ; CHECK: idivl @@ -97,7 +97,7 @@ entry: ret i32 %result } -; CHECK: test_srem32: +; CHECK-LABEL: test_srem32: ; CHECK: cltd ; CHECK: idivl @@ -107,7 +107,7 @@ entry: ret i32 %result } -; CHECK: test_udiv32: +; CHECK-LABEL: test_udiv32: ; CHECK: xorl ; CHECK: divl @@ -117,6 +117,6 @@ entry: ret i32 %result } -; CHECK: test_urem32: +; CHECK-LABEL: test_urem32: ; CHECK: xorl ; CHECK: divl |