diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2015-08-07 23:02:44 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2015-08-07 23:02:44 +0000 |
| commit | 51ece4aae5857052d224ce52277924c74685714e (patch) | |
| tree | ca13cf9e2e8c2499f61f1246e455efd2804abd36 /test/CodeGen/builtins-ppc-altivec.c | |
| parent | c192b3dcffd5e672a2b2e1730e2440febb4fb192 (diff) | |
Notes
Diffstat (limited to 'test/CodeGen/builtins-ppc-altivec.c')
| -rw-r--r-- | test/CodeGen/builtins-ppc-altivec.c | 88 |
1 files changed, 76 insertions, 12 deletions
diff --git a/test/CodeGen/builtins-ppc-altivec.c b/test/CodeGen/builtins-ppc-altivec.c index c6aa3c2faac21..8e8216b10111e 100644 --- a/test/CodeGen/builtins-ppc-altivec.c +++ b/test/CodeGen/builtins-ppc-altivec.c @@ -1081,6 +1081,31 @@ void test6() { // CHECK: @llvm.ppc.altivec.vctuxs // CHECK-LE: @llvm.ppc.altivec.vctuxs + /* vec_div */ + res_vsc = vec_div(vsc, vsc); +// CHECK: sdiv <16 x i8> +// CHECK-LE: sdiv <16 x i8> + + res_vuc = vec_div(vuc, vuc); +// CHECK: udiv <16 x i8> +// CHECK-LE: udiv <16 x i8> + + res_vs = vec_div(vs, vs); +// CHECK: sdiv <8 x i16> +// CHECK-LE: sdiv <8 x i16> + + res_vus = vec_div(vus, vus); +// CHECK: udiv <8 x i16> +// CHECK-LE: udiv <8 x i16> + + res_vi = vec_div(vi, vi); +// CHECK: sdiv <4 x i32> +// CHECK-LE: sdiv <4 x i32> + + res_vui = vec_div(vui, vui); +// CHECK: udiv <4 x i32> +// CHECK-LE: udiv <4 x i32> + /* vec_dss */ vec_dss(0); // CHECK: @llvm.ppc.altivec.dss @@ -2127,6 +2152,31 @@ void test6() { // CHECK: @llvm.ppc.altivec.mtvscr // CHECK-LE: @llvm.ppc.altivec.mtvscr + /* vec_mul */ + res_vsc = vec_mul(vsc, vsc); +// CHECK: mul <16 x i8> +// CHECK-LE: mul <16 x i8> + + res_vuc = vec_mul(vuc, vuc); +// CHECK: mul <16 x i8> +// CHECK-LE: mul <16 x i8> + + res_vs = vec_mul(vs, vs); +// CHECK: mul <8 x i16> +// CHECK-LE: mul <8 x i16> + + res_vus = vec_mul(vus, vus); +// CHECK: mul <8 x i16> +// CHECK-LE: mul <8 x i16> + + res_vi = vec_mul(vi, vi); +// CHECK: mul <4 x i32> +// CHECK-LE: mul <4 x i32> + + res_vui = vec_mul(vui, vui); +// CHECK: mul <4 x i32> +// CHECK-LE: mul <4 x i32> + /* vec_mule */ res_vs = vec_mule(vsc, vsc); // CHECK: @llvm.ppc.altivec.vmulesb @@ -3272,6 +3322,15 @@ void test6() { // CHECK: @llvm.ppc.altivec.vperm // CHECK-LE: @llvm.ppc.altivec.vperm + res_vbs = vec_sld(vbs, vbs, 0); +// CHECK: [[T1:%.+]] = bitcast <8 x i16> {{.+}} to <4 x i32> +// CHECK: [[T2:%.+]] = bitcast <8 x i16> {{.+}} to <4 x i32> +// CHECK: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> +// CHECK-LE: xor <16 x i8> +// CHECK-LE: [[T1:%.+]] = bitcast <8 x i16> {{.+}} to <4 x i32> +// CHECK-LE: [[T2:%.+]] = bitcast <8 x i16> {{.+}} to <4 x i32> +// CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> [[T1]], <4 x i32> [[T2]], <16 x i8> + res_vp = vec_sld(vp, vp, 0); // CHECK: @llvm.ppc.altivec.vperm // CHECK-LE: @llvm.ppc.altivec.vperm @@ -3284,6 +3343,11 @@ void test6() { // CHECK: @llvm.ppc.altivec.vperm // CHECK-LE: @llvm.ppc.altivec.vperm + res_vbi = vec_sld(vbi, vbi, 0); +// CHECK: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> {{.+}}, <4 x i32> {{.+}}, <16 x i8> +// CHECK-LE: xor <16 x i8> +// CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> {{.+}}, <4 x i32> {{.+}}, <16 x i8> + res_vf = vec_sld(vf, vf, 0); // CHECK: @llvm.ppc.altivec.vperm // CHECK-LE: @llvm.ppc.altivec.vperm @@ -3802,28 +3866,28 @@ void test6() { /* vec_sr */ res_vsc = vec_sr(vsc, vuc); -// CHECK: shr <16 x i8> -// CHECK-LE: shr <16 x i8> +// CHECK: lshr <16 x i8> +// CHECK-LE: lshr <16 x i8> res_vuc = vec_sr(vuc, vuc); -// CHECK: shr <16 x i8> -// CHECK-LE: shr <16 x i8> +// CHECK: lshr <16 x i8> +// CHECK-LE: lshr <16 x i8> res_vs = vec_sr(vs, vus); -// CHECK: shr <8 x i16> -// CHECK-LE: shr <8 x i16> +// CHECK: lshr <8 x i16> +// CHECK-LE: lshr <8 x i16> res_vus = vec_sr(vus, vus); -// CHECK: shr <8 x i16> -// CHECK-LE: shr <8 x i16> +// CHECK: lshr <8 x i16> +// CHECK-LE: lshr <8 x i16> res_vi = vec_sr(vi, vui); -// CHECK: shr <4 x i32> -// CHECK-LE: shr <4 x i32> +// CHECK: lshr <4 x i32> +// CHECK-LE: lshr <4 x i32> res_vui = vec_sr(vui, vui); -// CHECK: shr <4 x i32> -// CHECK-LE: shr <4 x i32> +// CHECK: lshr <4 x i32> +// CHECK-LE: lshr <4 x i32> res_vsc = vec_vsrb(vsc, vuc); // CHECK: shr <16 x i8> |
