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-rw-r--r--src/arm/berlin2cd.dtsi319
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diff --git a/src/arm/berlin2cd.dtsi b/src/arm/berlin2cd.dtsi
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--- a/src/arm/berlin2cd.dtsi
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-/*
- * Device Tree Include file for Marvell Armada 1500-mini (Berlin BG2CD) SoC
- *
- * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
- *
- * based on GPL'ed 2.6 kernel sources
- * (c) Marvell International Ltd.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include "skeleton.dtsi"
-#include <dt-bindings/clock/berlin2.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
- model = "Marvell Armada 1500-mini (BG2CD) SoC";
- compatible = "marvell,berlin2cd", "marvell,berlin";
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "arm,cortex-a9";
- device_type = "cpu";
- next-level-cache = <&l2>;
- reg = <0>;
- };
- };
-
- refclk: oscillator {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <25000000>;
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&gic>;
-
- ranges = <0 0xf7000000 0x1000000>;
-
- l2: l2-cache-controller@ac0000 {
- compatible = "arm,pl310-cache";
- reg = <0xac0000 0x1000>;
- cache-unified;
- cache-level = <2>;
- };
-
- gic: interrupt-controller@ad1000 {
- compatible = "arm,cortex-a9-gic";
- reg = <0xad1000 0x1000>, <0xad0100 0x0100>;
- interrupt-controller;
- #interrupt-cells = <3>;
- };
-
- local-timer@ad0600 {
- compatible = "arm,cortex-a9-twd-timer";
- reg = <0xad0600 0x20>;
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&chip CLKID_TWD>;
- };
-
- apb@e80000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
-
- ranges = <0 0xe80000 0x10000>;
- interrupt-parent = <&aic>;
-
- gpio0: gpio@0400 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x0400 0x400>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- porta: gpio-port@0 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- snps,nr-gpios = <8>;
- reg = <0>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <0>;
- };
- };
-
- gpio1: gpio@0800 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x0800 0x400>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- portb: gpio-port@1 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- snps,nr-gpios = <8>;
- reg = <0>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <1>;
- };
- };
-
- gpio2: gpio@0c00 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x0c00 0x400>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- portc: gpio-port@2 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- snps,nr-gpios = <8>;
- reg = <0>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <2>;
- };
- };
-
- gpio3: gpio@1000 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x1000 0x400>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- portd: gpio-port@3 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- snps,nr-gpios = <8>;
- reg = <0>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <3>;
- };
- };
-
- timer0: timer@2c00 {
- compatible = "snps,dw-apb-timer";
- reg = <0x2c00 0x14>;
- interrupts = <8>;
- clocks = <&chip CLKID_CFG>;
- clock-names = "timer";
- status = "okay";
- };
-
- timer1: timer@2c14 {
- compatible = "snps,dw-apb-timer";
- reg = <0x2c14 0x14>;
- interrupts = <9>;
- clocks = <&chip CLKID_CFG>;
- clock-names = "timer";
- status = "okay";
- };
-
- timer2: timer@2c28 {
- compatible = "snps,dw-apb-timer";
- reg = <0x2c28 0x14>;
- interrupts = <10>;
- clocks = <&chip CLKID_CFG>;
- clock-names = "timer";
- status = "disabled";
- };
-
- timer3: timer@2c3c {
- compatible = "snps,dw-apb-timer";
- reg = <0x2c3c 0x14>;
- interrupts = <11>;
- clocks = <&chip CLKID_CFG>;
- clock-names = "timer";
- status = "disabled";
- };
-
- timer4: timer@2c50 {
- compatible = "snps,dw-apb-timer";
- reg = <0x2c50 0x14>;
- interrupts = <12>;
- clocks = <&chip CLKID_CFG>;
- clock-names = "timer";
- status = "disabled";
- };
-
- timer5: timer@2c64 {
- compatible = "snps,dw-apb-timer";
- reg = <0x2c64 0x14>;
- interrupts = <13>;
- clocks = <&chip CLKID_CFG>;
- clock-names = "timer";
- status = "disabled";
- };
-
- timer6: timer@2c78 {
- compatible = "snps,dw-apb-timer";
- reg = <0x2c78 0x14>;
- interrupts = <14>;
- clocks = <&chip CLKID_CFG>;
- clock-names = "timer";
- status = "disabled";
- };
-
- timer7: timer@2c8c {
- compatible = "snps,dw-apb-timer";
- reg = <0x2c8c 0x14>;
- interrupts = <15>;
- clocks = <&chip CLKID_CFG>;
- clock-names = "timer";
- status = "disabled";
- };
-
- aic: interrupt-controller@3000 {
- compatible = "snps,dw-apb-ictl";
- reg = <0x3000 0xc00>;
- interrupt-controller;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- chip: chip-control@ea0000 {
- compatible = "marvell,berlin2cd-chip-ctrl";
- #clock-cells = <1>;
- reg = <0xea0000 0x400>;
- clocks = <&refclk>;
- clock-names = "refclk";
-
- uart0_pmux: uart0-pmux {
- groups = "G6";
- function = "uart0";
- };
- };
-
- apb@fc0000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
-
- ranges = <0 0xfc0000 0x10000>;
- interrupt-parent = <&sic>;
-
- sm_gpio1: gpio@5000 {
- compatible = "snps,dw-apb-gpio";
- reg = <0x5000 0x400>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- portf: gpio-port@5 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- snps,nr-gpios = <8>;
- reg = <0>;
- };
- };
-
- sm_gpio0: gpio@c000 {
- compatible = "snps,dw-apb-gpio";
- reg = <0xc000 0x400>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- porte: gpio-port@4 {
- compatible = "snps,dw-apb-gpio-port";
- gpio-controller;
- #gpio-cells = <2>;
- snps,nr-gpios = <8>;
- reg = <0>;
- };
- };
-
- uart0: serial@9000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x9000 0x100>;
- reg-shift = <2>;
- reg-io-width = <1>;
- interrupts = <8>;
- clocks = <&refclk>;
- pinctrl-0 = <&uart0_pmux>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- uart1: serial@a000 {
- compatible = "snps,dw-apb-uart";
- reg = <0xa000 0x100>;
- reg-shift = <2>;
- reg-io-width = <1>;
- interrupts = <9>;
- clocks = <&refclk>;
- status = "disabled";
- };
-
- sysctrl: system-controller@d000 {
- compatible = "marvell,berlin2cd-system-ctrl";
- reg = <0xd000 0x100>;
- };
-
- sic: interrupt-controller@e000 {
- compatible = "snps,dw-apb-ictl";
- reg = <0xe000 0x400>;
- interrupt-controller;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
- };
-};