diff options
Diffstat (limited to 'test/CodeGen/X86/misched-matmul.ll')
| -rw-r--r-- | test/CodeGen/X86/misched-matmul.ll | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/test/CodeGen/X86/misched-matmul.ll b/test/CodeGen/X86/misched-matmul.ll index 15e8a0ad6f4ba..5454b7cf780a1 100644 --- a/test/CodeGen/X86/misched-matmul.ll +++ b/test/CodeGen/X86/misched-matmul.ll @@ -3,11 +3,14 @@ ; ; Verify that register pressure heuristics are working in MachineScheduler. ; -; When we enable subtree scheduling heuristics on X86, we may need a -; flag to disable it for this test case. +; We can further reduce spills in this case with a global register +; pressure heuristic, like sethi-ullman numbers or biasing toward +; scheduled subtrees. However, these heuristics are marginally +; beneficial on x86_64 and exacerbate register pressure in other +; more complex cases. ; ; CHECK: @wrap_mul4 -; CHECK: 30 regalloc - Number of spills inserted +; CHECK: 23 regalloc - Number of spills inserted define void @wrap_mul4(double* nocapture %Out, [4 x double]* nocapture %A, [4 x double]* nocapture %B) #0 { entry: @@ -221,4 +224,4 @@ entry: ret void } -attributes #0 = { noinline nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { noinline nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } |