aboutsummaryrefslogtreecommitdiff
path: root/test/src/apl11.ptt
diff options
context:
space:
mode:
Diffstat (limited to 'test/src/apl11.ptt')
-rw-r--r--test/src/apl11.ptt80
1 files changed, 80 insertions, 0 deletions
diff --git a/test/src/apl11.ptt b/test/src/apl11.ptt
new file mode 100644
index 0000000000000..a0824a6f2b9a9
--- /dev/null
+++ b/test/src/apl11.ptt
@@ -0,0 +1,80 @@
+; Copyright (c) 2017-2018, Intel Corporation
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+;
+; * Redistributions of source code must retain the above copyright notice,
+; this list of conditions and the following disclaimer.
+; * Redistributions in binary form must reproduce the above copyright notice,
+; this list of conditions and the following disclaimer in the documentation
+; and/or other materials provided with the distribution.
+; * Neither the name of Intel Corporation nor the names of its contributors
+; may be used to endorse or promote products derived from this software
+; without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+; POSSIBILITY OF SUCH DAMAGE.
+
+; APL11: Intel(R) PT OVF Pakcet May Be Followed by TIP.PGD Packet
+;
+; If Intel PT (Processor Trace) encounters an internal buffer overflow
+; and generates an OVF (Overflow) packet just as IA32_RTIT_CTL (MSR
+; 570H) bit 0 (TraceEn) is cleared, or during a far transfer that
+; causes IA32_RTIT_STATUS.ContextEn[1] (MSR 571H) to be cleared, the
+; OVF may be followed by a TIP.PGD (Target Instruction Pointer - Packet
+; Generation Disable) packet.
+;
+; cpu 6/92
+; cpu 6/95
+;
+
+org 0x1000
+bits 64
+
+; @pt p0: psb()
+; @pt p1: mode.exec(64bit)
+; @pt p2: fup(3: %l0)
+; @pt p3: psbend()
+l0: hlt
+
+; @pt p4: ovf()
+; @pt p5: tip.pgd(3: %l1)
+l1: hlt
+
+; @pt p6: mode.exec(64bit)
+; @pt p7: tip.pge(3: %l2)
+l2: nop
+
+; @pt p8: fup(1: %l3)
+; @pt p9: tip.pgd(0: %l3)
+l3: hlt
+
+
+; @pt .exp(ptdump)
+;%0p0 psb
+;%0p1 mode.exec cs.l
+;%0p2 fup 3: %?l0
+;%0p3 psbend
+;%0p4 ovf
+;%0p5 tip.pgd 3: %?l1
+;%0p6 mode.exec cs.l
+;%0p7 tip.pge 3: %?l2
+;%0p8 fup 1: %?l3.2
+;%0p9 tip.pgd 0: %?l3.0
+
+
+; @pt .exp(ptxed)
+;[overflow]
+;[enabled]
+;[exec mode: 64-bit]
+;%0l2
+;[disabled]