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* [PowerPC] Fix SPE floating point environment manipulationBrandon Bergren2019-12-122-2/+2
| | | | | | | | | | | | | | | Fix multiple problems in the powerpcspe floating point code. * Endianness handling of the SPEFSCR in fenv.h was completely broken. * Ensure SPEFSCR synchronization requirements are being met. The __r.__d -> __r transformations were written by jhibbits. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D22526 Notes: svn path=/head/; revision=355656
* Fix fabs(3) for powerpcspe, this time for realJustin Hibbits2018-07-261-1/+2
| | | | | | | | | | SPE ABI uses the soft-float ABI, which splits doubles into two words. As such, fabs(3) cannot work on a double directly. It's too costly to convert the argument pair into a single double to use efdabs, so clear the top bit of the high word, which is the sign bit. Notes: svn path=/head/; revision=336739
* Fix register usage in fabs(3) for powerpcspeJustin Hibbits2018-07-241-1/+1
| | | | | | | | This still used the FPU register definition, which gcc converted to using %r1 (stack register). Fix to use %r3. Notes: svn path=/head/; revision=336689
* Fix floating point exception definitions for powerpcspeJustin Hibbits2018-07-242-3/+3
| | | | | | | These were incorrectly implemented in the original port. Notes: svn path=/head/; revision=336688
* Fix a copy&paste-o causing a segfault with sigsetjmp.Justin Hibbits2016-10-292-46/+46
| | | | | | | | I'm not sure how this passed my code inspection and initial testing, it's obviously wrong. Found when debugging csh. Notes: svn path=/head/; revision=308072
* Reduce code duplication between powerpc and powerpcspeJustin Hibbits2016-10-228-466/+4
| | | | | | | | They're nearly identical except for a few files. Reported by: kib Notes: svn path=/head/; revision=307799
* Create a new MACHINE_ARCH for Freescale PowerPC e500v2Justin Hibbits2016-10-2218-0/+1228
Summary: The Freescale e500v2 PowerPC core does not use a standard FPU. Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector processor unit, which doubles as a FPU. The PowerPC SPE ABI is incompatible with the stock powerpc ABI, so a new MACHINE_ARCH was created to deal with this. Additionaly, the SPE opcodes overlap with Altivec, so these are mutually exclusive. Taking advantage of this fact, a new file, powerpc/booke/spe.c, was created with the same function set as in powerpc/powerpc/altivec.c, so it becomes effectively a drop-in replacement. setjmp/longjmp were modified to save the upper 32-bits of the now-64-bit GPRs (upper 32-bits are only accessible by the SPE). Note: This does _not_ support the SPE in the e500v1, as the e500v1 SPE does not support double-precision floating point. Also, without a new MACHINE_ARCH it would be impossible to provide binary packages which utilize the SPE. Additionally, no work has been done to support ports, work is needed for this. This also means no newer gcc can yet be used. However, gcc's powerpc support has been refactored which would make adding a powerpcspe-freebsd target very easy. Test Plan: This was lightly tested on a RouterBoard RB800 and an AmigaOne A1222 (P1022-based) board, compiled against the new ABI. Base system utilities (/bin/sh, /bin/ls, etc) still function appropriately, the system is able to boot multiuser. Reviewed By: bdrewery, imp Relnotes: yes Differential Revision: https://reviews.freebsd.org/D5683 Notes: svn path=/head/; revision=307761