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* Honor the disabled setting for MSI-X interrupts for passthrough devices.John Baldwin2020-11-241-1/+15
| | | | | | | | | | | | | | | | | | | | | | | Add a new ioctl to disable all MSI-X interrupts for a PCI passthrough device and invoke it if a write to the MSI-X capability registers disables MSI-X. This avoids leaving MSI-X interrupts enabled on the host if a guest device driver has disabled them (e.g. as part of detaching a guest device driver). This was found by Chelsio QA when testing that a Linux guest could switch from MSI-X to MSI interrupts when using the cxgb4vf driver. While here, explicitly fail requests to enable MSI on a passthrough device if MSI-X is enabled and vice versa. Reported by: Sony Arpita Das @ Chelsio Reviewed by: grehan, markj MFC after: 2 weeks Sponsored by: Chelsio Communications Differential Revision: https://reviews.freebsd.org/D27212 Notes: svn path=/head/; revision=368003
* vmm(4), bhyve(8): Expose kernel-emulated special devices to userspaceConrad Meyer2020-05-151-0/+20
| | | | | | | | | | | | | | | Expose the special kernel LAPIC, IOAPIC, and HPET devices to userspace for use in, e.g., fallback instruction emulation (when userspace has a newer instruction decode/emulation layer than the kernel vmm(4)). Plumb the ioctl through libvmmapi and register the memory ranges in bhyve(8). Reviewed by: grehan Differential Revision: https://reviews.freebsd.org/D24525 Notes: svn path=/head/; revision=361082
* Initial support for bhyve save and restore.John Baldwin2020-05-051-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Save and restore (also known as suspend and resume) permits a snapshot to be taken of a guest's state that can later be resumed. In the current implementation, bhyve(8) creates a UNIX domain socket that is used by bhyvectl(8) to send a request to save a snapshot (and optionally exit after the snapshot has been taken). A snapshot currently consists of two files: the first holds a copy of guest RAM, and the second file holds other guest state such as vCPU register values and device model state. To resume a guest, bhyve(8) must be started with a matching pair of command line arguments to instantiate the same set of device models as well as a pointer to the saved snapshot. While the current implementation is useful for several uses cases, it has a few limitations. The file format for saving the guest state is tied to the ABI of internal bhyve structures and is not self-describing (in that it does not communicate the set of device models present in the system). In addition, the state saved for some device models closely matches the internal data structures which might prove a challenge for compatibility of snapshot files across a range of bhyve versions. The file format also does not currently support versioning of individual chunks of state. As a result, the current file format is not a fixed binary format and future revisions to save and restore will break binary compatiblity of snapshot files. The goal is to move to a more flexible format that adds versioning, etc. and at that point to commit to providing a reasonable level of compatibility. As a result, the current implementation is not enabled by default. It can be enabled via the WITH_BHYVE_SNAPSHOT=yes option for userland builds, and the kernel option BHYVE_SHAPSHOT. Submitted by: Mihai Tiganus, Flavius Anton, Darius Mihai Submitted by: Elena Mihailescu, Mihai Carabas, Sergiu Weisz Relnotes: yes Sponsored by: University Politehnica of Bucharest Sponsored by: Matthew Grooms (student scholarships) Sponsored by: iXsystems Differential Revision: https://reviews.freebsd.org/D19495 Notes: svn path=/head/; revision=360648
* Map negative types passed to vm_capability_type2name to NULL.John Baldwin2020-04-211-1/+1
| | | | | | | Submitted by: vangyzen Notes: svn path=/head/; revision=360178
* Add description string for VM_CAP_BPT_EXIT.John Baldwin2020-04-211-19/+12
| | | | | | | | | | | | | While here, replace the array of mapping structures with an array of string pointers where the index is the capability value. Submitted by: Rob Fairbanks <rob.fx907@gmail.com> Reviewed by: rgrimes MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D24289 Notes: svn path=/head/; revision=360166
* Forgotten to remove the previous if statement in commit r355838.Marcelo Araujo2019-12-171-4/+2
| | | | | | | | MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D19400 Notes: svn path=/head/; revision=355839
* Attempt to load vmm(4) module before creating a guest using vm_create()Marcelo Araujo2019-12-171-1/+7
| | | | | | | | | | | | wrapper in libvmmapi. Submitted by: Rob Fairbanks <rob.fx907_gmail.com> Reviewed by: jhb MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D19400 Notes: svn path=/head/; revision=355838
* bhyve: Use MAP_GUARD when mapping guest memory ranges.John Baldwin2018-09-061-5/+4
| | | | | | | | | | | | | | | | Instead of relying on PROT_NONE mappings with MAP_ANON, use MAP_GUARD to reserve address space around guest memory ranges including the guard ranges of address space around mappings. Submitted by: Shawn Webb Reviewed by: araujo Approved by: re (rgrimes) MFC after: 1 month Sponsored by: HardendBSD and G2, Inc Differential Revision: https://reviews.freebsd.org/D16822 Notes: svn path=/head/; revision=338511
* Fix style(9) space vs tab.Marcelo Araujo2018-06-141-7/+6
| | | | | | | | | | Reviewed by: jhb MFC after: 3 weeks. Sponsored by: iXsystems Inc. Differential Revision: https://reviews.freebsd.org/D15774 Notes: svn path=/head/; revision=335103
* Add the ability to control the CPU topology of created VMsRodney W. Grimes2018-04-081-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | from userland without the need to use sysctls, it allows the old sysctls to continue to function, but deprecates them at FreeBSD_version 1200060 (Relnotes for deprecate). The command line of bhyve is maintained in a backwards compatible way. The API of libvmmapi is maintained in a backwards compatible way. The sysctl's are maintained in a backwards compatible way. Added command option looks like: bhyve -c [[cpus=]n][,sockets=n][,cores=n][,threads=n][,maxcpus=n] The optional parts can be specified in any order, but only a single integer invokes the backwards compatible parse. [,maxcpus=n] is hidden by #ifdef until kernel support is added, though the api is put in place. bhyvectl --get-cpu-topology option added. Reviewed by: grehan (maintainer, earlier version), Reviewed by: bcr (manpages) Approved by: bde (mentor), phk (mentor) Tested by: Oleg Ginzburg <olevole@olevole.ru> (cbsd) MFC after: 1 week Relnotes: Y Differential Revision: https://reviews.freebsd.org/D9930 Notes: svn path=/head/; revision=332298
* Add a way to temporarily suspend and resume virtual CPUs.John Baldwin2018-04-061-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | This is used as part of implementing run control in bhyve's debug server. The hypervisor now maintains a set of "debugged" CPUs. Attempting to run a debugged CPU will fail to execute any guest instructions and will instead report a VM_EXITCODE_DEBUG exit to the userland hypervisor. Virtual CPUs are placed into the debugged state via vm_suspend_cpu() (implemented via a new VM_SUSPEND_CPU ioctl). Virtual CPUs can be resumed via vm_resume_cpu() (VM_RESUME_CPU ioctl). The debug server suspends virtual CPUs when it wishes them to stop executing in the guest (for example, when a debugger attaches to the server). The debug server can choose to resume only a subset of CPUs (for example, when single stepping) or it can choose to resume all CPUs. The debug server must explicitly mark a CPU as resumed via vm_resume_cpu() before the virtual CPU will successfully execute any guest instructions. Reviewed by: avg, grehan Tested on: Intel (jhb), AMD (avg) Differential Revision: https://reviews.freebsd.org/D14466 Notes: svn path=/head/; revision=332157
* Add a new variant of the GLA2GPA ioctl for use by the debug server.John Baldwin2018-02-261-0/+22
| | | | | | | | | | | | | | | | Unlike the existing GLA2GPA ioctl, GLA2GPA_NOFAULT does not modify the guest. In particular, it does not inject any faults or modify PTEs in the guest when performing an address space translation. This is used by bhyve's debug server to read and write memory for the remote debugger. Reviewed by: grehan MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D14075 Notes: svn path=/head/; revision=330032
* Add two new ioctls to bhyve for batch register fetch/store operations.John Baldwin2018-02-221-0/+35
| | | | | | | | | | | | | These are a convenience for bhyve's debug server to use a single ioctl for 'g' and 'G' rather than a loop of individual get/set ioctl requests. Reviewed by: grehan MFC after: 2 months Differential Revision: https://reviews.freebsd.org/D14074 Notes: svn path=/head/; revision=329768
* lib: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-261-0/+2
| | | | | | | | | | | | | | | Mainly focus on files that use BSD 2-Clause license, however the tool I was using mis-identified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Notes: svn path=/head/; revision=326219
* Capsicum support for bhyve(8).Bartek Rutkowski2017-02-141-0/+42
| | | | | | | | | | | | | Adds Capsicum sandboxing to bhyve. Submitted by: Pawel Biernacki <pawel.biernacki@gmail.com> Reviewed by: grehan, oshogbo Approved by: emaste, grehan Sponsored by: Mysterious Code Ltd. Differential Revision: https://reviews.freebsd.org/D8290 Notes: svn path=/head/; revision=313727
* Fix possible integer overflow in guest memory bounds checking, which couldGleb Smirnoff2016-12-061-3/+8
| | | | | | | | | | | lead to access from the virtual machine to the heap of the bhyve(8) process. Submitted by: Felix Wilhelm <fwilhelm ernw.de> Patch by: grehan Security: FreeBSD-SA-16:38.bhyve Notes: svn path=/head/; revision=309640
* As <machine/param.h> is included from <sys/param.h>, there is no needSvatopluk Kraus2016-02-221-1/+0
| | | | | | | | | | to include it explicitly when <sys/param.h> is already included. Reviewed by: alc, kib Differential Revision: https://reviews.freebsd.org/D5378 Notes: svn path=/head/; revision=295881
* Move the 'devmem' device nodes from /dev/vmm to /dev/vmm.ioNeel Natu2015-07-061-1/+1
| | | | | | | | | | | Some external tools just do a 'ls /dev/vmm' to figure out the bhyve virtual machines on the host. These tools break if the devmem device nodes also appear in /dev/vmm. Requested by: grehan Notes: svn path=/head/; revision=285218
* Fix a regression in "movs" emulation after r284539. The regression was causedNeel Natu2015-06-221-8/+17
| | | | | | | | | | | | | | | | | | | | | | due to a change in behavior of the 'vm_map_gpa()'. Prior to r284539 if 'vm_map_gpa()' was called to map an address range in the guest MMIO region then it would return NULL. This was used by the "movs" emulation to detect if the 'src' or 'dst' operand was in MMIO space. Post r284539 'vm_map_gpa()' started returning a non-NULL pointer even when mapping the guest MMIO region. Fix this by returning non-NULL only if [gaddr, gaddr+len) is entirely within the 'lowmem' or 'highmem' regions and NULL otherwise. Pointy hat to: neel Reviewed by: grehan Reported by: tychon, Ben Perrault (ben.perrault@gmail.com) MFC after: 1 week Notes: svn path=/head/; revision=284688
* Restructure memory allocation in bhyve to support "devmem".Neel Natu2015-06-181-58/+262
| | | | | | | | | | | | | | | | | | | | | | | | devmem is used to represent MMIO devices like the boot ROM or a VESA framebuffer where doing a trap-and-emulate for every access is impractical. devmem is a hybrid of system memory (sysmem) and emulated device models. devmem is mapped in the guest address space via nested page tables similar to sysmem. However the address range where devmem is mapped may be changed by the guest at runtime (e.g. by reprogramming a PCI BAR). Also devmem is usually mapped RO or RW as compared to RWX mappings for sysmem. Each devmem segment is named (e.g. "bootrom") and this name is used to create a device node for the devmem segment (e.g. /dev/vmm/testvm.bootrom). The device node supports mmap(2) and this decouples the host mapping of devmem from its mapping in the guest address space (which can change). Reviewed by: tychon Discussed with: grehan Differential Revision: https://reviews.freebsd.org/D2762 MFC after: 4 weeks Notes: svn path=/head/; revision=284539
* Deprecate the 3-way return values from vm_gla2gpa() and vm_copy_setup().Neel Natu2015-05-061-23/+11
| | | | | | | | | | | | | | | | | | | | | Prior to this change both functions returned 0 for success, -1 for failure and +1 to indicate that an exception was injected into the guest. The numerical value of ERESTART also happens to be -1 so when these functions returned -1 it had to be translated to a positive errno value to prevent the VM_RUN ioctl from being inadvertently restarted. This made it easy to introduce bugs when writing emulation code. Fix this by adding an 'int *guest_fault' parameter and setting it to '1' if an exception was delivered to the guest. The return value is 0 or EFAULT so no additional translation is needed. Reviewed by: tychon MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D2428 Notes: svn path=/head/; revision=282558
* Fix "MOVS" instruction memory to MMIO emulation. Currently updates toTycho Nightingale2015-04-011-0/+12
| | | | | | | | | | | | %rdi, %rsi, etc are inadvertently bypassed along with the check to see if the instruction needs to be repeated per the 'rep' prefix. Add "MOVS" instruction support for the 'MMIO to MMIO' case. Reviewed by: neel Notes: svn path=/head/; revision=280929
* Fix a bug in libvmmapi 'vm_copy_setup()' where it would return success even ifNeel Natu2015-01-191-7/+15
| | | | | | | | | | | | | | | the 'gpa' was in the guest MMIO region. This would manifest as a segmentation fault in 'vm_map_copyin()' or 'vm_map_copyout()' because 'vm_map_gpa()' would return NULL for this 'gpa'. Fix this by calling 'vm_map_gpa()' in 'vm_copy_setup' and returning a failure if the 'gpa' cannot be mapped. This matches the behavior of 'vm_copy_setup()' in vmm.ko. MFC after: 1 week Notes: svn path=/head/; revision=277359
* Simplify instruction restart logic in bhyve.Neel Natu2015-01-181-22/+15
| | | | | | | | | | | | | | | | | | | | | | | | | Keep track of the next instruction to be executed by the vcpu as 'nextrip'. As a result the VM_RUN ioctl no longer takes the %rip where a vcpu should start execution. Also, instruction restart happens implicitly via 'vm_inject_exception()' or explicitly via 'vm_restart_instruction()'. The APIs behave identically in both kernel and userspace contexts. The main beneficiary is the instruction emulation code that executes in both contexts. bhyve(8) VM exit handlers now treat 'vmexit->rip' and 'vmexit->inst_length' as readonly: - Restarting an instruction is now done by calling 'vm_restart_instruction()' as opposed to setting 'vmexit->inst_length' to 0 (e.g. emulate_inout()) - Resuming vcpu at an arbitrary %rip is now done by setting VM_REG_GUEST_RIP as opposed to changing 'vmexit->rip' (e.g. vmexit_task_switch()) Differential Revision: https://reviews.freebsd.org/D1526 Reviewed by: grehan MFC after: 2 weeks Notes: svn path=/head/; revision=277310
* Replace bhyve's minimal RTC emulation with a fully featured one in vmm.ko.Neel Natu2014-12-301-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | The new RTC emulation supports all interrupt modes: periodic, update ended and alarm. It is also capable of maintaining the date/time and NVRAM contents across virtual machine reset. Also, the date/time fields can now be modified by the guest. Since bhyve now emulates both the PIT and the RTC there is no need for "Legacy Replacement Routing" in the HPET so get rid of it. The RTC device state can be inspected via bhyvectl as follows: bhyvectl --vm=vm --get-rtc-time bhyvectl --vm=vm --set-rtc-time=<unix_time_secs> bhyvectl --vm=vm --rtc-nvram-offset=<offset> --get-rtc-nvram bhyvectl --vm=vm --rtc-nvram-offset=<offset> --set-rtc-nvram=<value> Reviewed by: tychon Discussed with: grehan Differential Revision: https://reviews.freebsd.org/D1385 MFC after: 2 weeks Notes: svn path=/head/; revision=276428
* Fix fault injection in bhyve.Neel Natu2014-07-241-27/+0
| | | | | | | | | | | | | | The faulting instruction needs to be restarted when the exception handler is done handling the fault. bhyve now does this correctly by setting 'vmexit[vcpu].inst_length' to zero so the %rip is not advanced. A minor complication is that the fault injection APIs are used by instruction emulation code that is shared by vmm.ko and bhyve. Thus the argument that refers to 'struct vm *' in kernel or 'struct vmctx *' in userspace needs to be loosely typed as a 'void *'. Notes: svn path=/head/; revision=269042
* Emulate instructions emitted by OpenBSD/i386 version 5.5:Neel Natu2014-07-231-1/+39
| | | | | | | | | | - CMP REG, r/m - MOV AX/EAX/RAX, moffset - MOV moffset, AX/EAX/RAX - PUSH r/m Notes: svn path=/head/; revision=269008
* Handle nested exceptions in bhyve.Neel Natu2014-07-191-0/+29
| | | | | | | | | | | | | | | | | | | A nested exception condition arises when a second exception is triggered while delivering the first exception. Most nested exceptions can be handled serially but some are converted into a double fault. If an exception is generated during delivery of a double fault then the virtual machine shuts down as a result of a triple fault. vm_exit_intinfo() is used to record that a VM-exit happened while an event was being delivered through the IDT. If an exception is triggered while handling the VM-exit it will be treated like a nested exception. vm_entry_intinfo() is used by processor-specific code to get the event to be injected into the guest on the next VM-entry. This function is responsible for deciding the disposition of nested exceptions. Notes: svn path=/head/; revision=268889
* Provide APIs to directly get 'lowmem' and 'highmem' size directly.Neel Natu2014-06-241-0/+14
| | | | | | | | | | | Previously the sizes were inferred indirectly based on the size of the mappings at 0 and 4GB respectively. This works fine as long as size of the allocation is identical to the size of the mapping in the guest's address space. However, if the mapping is disjoint then this assumption falls apart (e.g., due to the legacy BIOS hole between 640KB and 1MB). Notes: svn path=/head/; revision=267811
* Add ioctl(VM_REINIT) to reinitialize the virtual machine state maintainedNeel Natu2014-06-071-0/+7
| | | | | | | | | | by vmm.ko. This allows the virtual machine to be restarted without having to destroy it first. Reviewed by: grehan Notes: svn path=/head/; revision=267216
* Activate vcpus from bhyve(8) using the ioctl VM_ACTIVATE_CPU instead of doingNeel Natu2014-05-311-1/+43
| | | | | | | | | | | | | | it implicitly in vmm.ko. Add ioctl VM_GET_CPUS to get the current set of 'active' and 'suspended' cpus and display them via /usr/sbin/bhyvectl using the "--get-active-cpus" and "--get-suspended-cpus" options. This is in preparation for being able to reset virtual machine state without having to destroy and recreate it. Notes: svn path=/head/; revision=266933
* Fix issue with restarting an "insb/insw/insl" instruction because of a pageNeel Natu2014-05-261-28/+48
| | | | | | | | | | | | | | | | | fault on the destination buffer. Prior to this change a page fault would be detected in vm_copyout(). This was done after the I/O port access was done. If the I/O port access had side-effects (e.g. reading the uart FIFO) then restarting the instruction would result in incorrect behavior. Fix this by validating the guest linear address before doing the I/O port emulation. If the validation results in a page fault exception being injected into the guest then the instruction can now be restarted without any side-effects. Notes: svn path=/head/; revision=266708
* Add libvmmapi functions vm_copyin() and vm_copyout() to copy into and outNeel Natu2014-05-241-0/+86
| | | | | | | | | | | of the guest linear address space. These APIs in turn use a new ioctl 'VM_GLA2GPA' to convert the guest linear address to guest physical. Use the new copyin/copyout APIs when emulating ins/outs instruction in bhyve(8). Notes: svn path=/head/; revision=266633
* Implement a PCI interrupt router to route PCI legacy INTx interrupts toJohn Baldwin2014-05-151-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the legacy 8259A PICs. - Implement an ICH-comptabile PCI interrupt router on the lpc device with 8 steerable pins configured via config space access to byte-wide registers at 0x60-63 and 0x68-6b. - For each configured PCI INTx interrupt, route it to both an I/O APIC pin and a PCI interrupt router pin. When a PCI INTx interrupt is asserted, ensure that both pins are asserted. - Provide an initial routing of PCI interrupt router (PIRQ) pins to 8259A pins (ISA IRQs) and initialize the interrupt line config register for the corresponding PCI function with the ISA IRQ as this matches existing hardware. - Add a global _PIC method for OSPM to select the desired interrupt routing configuration. - Update the _PRT methods for PCI bridges to provide both APIC and legacy PRT tables and return the appropriate table based on the configured routing configuration. Note that if the lpc device is not configured, no routing information is provided. - When the lpc device is enabled, provide ACPI PCI link devices corresponding to each PIRQ pin. - Add a VMM ioctl to adjust the trigger mode (edge vs level) for 8259A pins via the ELCR. - Mark the power management SCI as level triggered. - Don't hardcode the number of elements in Packages in the source for the DSDT. iasl(8) will fill in the actual number of elements, and this makes it simpler to generate a Package with a variable number of elements. Reviewed by: tycho Notes: svn path=/head/; revision=266125
* Don't include the guest memory segments in the bhyve(8) process core dump.Neel Natu2014-05-131-3/+15
| | | | | | | | | | | | | | This has not added a lot of value when debugging bhyve issues while greatly increasing the time and space required to store the core file. Passing the "-C" option to bhyve(8) will change the default and dump guest memory in the core dump. Requested by: grehan Reviewed by: grehan Notes: svn path=/head/; revision=265951
* Allow a virtual machine to be forcibly reset or powered off. This is doneNeel Natu2014-04-281-2/+5
| | | | | | | | | | | | | | | | by adding an argument to the VM_SUSPEND ioctl that specifies how the virtual machine should be suspended, viz. VM_SUSPEND_RESET or VM_SUSPEND_POWEROFF. The disposition of VM_SUSPEND is also made available to the exit handler via the 'u.suspended' member of 'struct vm_exit'. This capability is exposed via the '--force-reset' and '--force-poweroff' arguments to /usr/sbin/bhyvectl. Discussed with: grehan@ Notes: svn path=/head/; revision=265062
* Add an ioctl to suspend a virtual machine (VM_SUSPEND). The ioctl can be calledNeel Natu2014-03-261-0/+7
| | | | | | | | | | | | | | | from any context i.e., it is not required to be called from a vcpu thread. The ioctl simply sets a state variable 'vm->suspend' to '1' and returns. The vcpus inspect 'vm->suspend' in the run loop and if it is set to '1' the vcpu breaks out of the loop with a reason of 'VM_EXITCODE_SUSPENDED'. The suspend handler waits until all 'vm->active_cpus' have transitioned to 'vm->suspended_cpus' before returning to userspace. Discussed with: grehan Notes: svn path=/head/; revision=263780
* Replace the userspace atpic stub with a more functional vmm.ko model.Tycho Nightingale2014-03-111-0/+35
| | | | | | | | | | | New ioctls VM_ISA_ASSERT_IRQ, VM_ISA_DEASSERT_IRQ and VM_ISA_PULSE_IRQ can be used to manipulate the pic, and optionally the ioapic, pin state. Reviewed by: jhb, neel Approved by: neel (co-mentor) Notes: svn path=/head/; revision=263035
* Queue pending exceptions in the 'struct vcpu' instead of directly updating theNeel Natu2014-02-261-16/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | processor-specific VMCS or VMCB. The pending exception will be delivered right before entering the guest. The order of event injection into the guest is: - hardware exception - NMI - maskable interrupt In the Intel VT-x case, a pending NMI or interrupt will enable the interrupt window-exiting and inject it as soon as possible after the hardware exception is injected. Also since interrupts are inherently asynchronous, injecting them after the hardware exception should not affect correctness from the guest perspective. Rename the unused ioctl VM_INJECT_EVENT to VM_INJECT_EXCEPTION and restrict it to only deliver x86 hardware exceptions. This new ioctl is now used to inject a protection fault when the guest accesses an unimplemented MSR. Discussed with: grehan, jhb Reviewed by: jhb Notes: svn path=/head/; revision=262506
* Enhance the support for PCI legacy INTx interrupts and enable them inJohn Baldwin2014-01-291-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | the virtio backends. - Add a new ioctl to export the count of pins on the I/O APIC from vmm to the hypervisor. - Use pins on the I/O APIC >= 16 for PCI interrupts leaving 0-15 for ISA interrupts. - Populate the MP Table with I/O interrupt entries for any PCI INTx interrupts. - Create a _PRT table under the PCI root bridge in ACPI to route any PCI INTx interrupts appropriately. - Track which INTx interrupts are in use per-slot so that functions that share a slot attempt to distribute their INTx interrupts across the four available pins. - Implicitly mask INTx interrupts if either MSI or MSI-X is enabled and when the INTx DIS bit is set in a function's PCI command register. Either assert or deassert the associated I/O APIC pin when the state of one of those conditions changes. - Add INTx support to the virtio backends. - Always advertise the MSI capability in the virtio backends. Submitted by: neel (7) Reviewed by: neel MFC after: 2 weeks Notes: svn path=/head/; revision=261268
* Extend the support for local interrupts on the local APIC:John Baldwin2013-12-231-0/+12
| | | | | | | | | | | | | | | | | | | | | | - Add a generic routine to trigger an LVT interrupt that supports both fixed and NMI delivery modes. - Add an ioctl and bhyvectl command to trigger local interrupts inside a guest. In particular, a global NMI similar to that raised by SERR# or PERR# can be simulated by asserting LINT1 on all vCPUs. - Extend the LVT table in the vCPU local APIC to support CMCI. - Flesh out the local APIC error reporting a bit to cache errors and report them via ESR when ESR is written to. Add support for asserting the error LVT when an error occurs. Raise illegal vector errors when attempting to signal an invalid vector for an interrupt or when sending an IPI. - Ignore writes to reserved bits in LVT entries. - Export table entries the MADT and MP Table advertising the stock x86 config of LINT0 set to ExtInt and LINT1 wired to NMI. Reviewed by: neel (earlier version) Notes: svn path=/head/; revision=259779
* Rename the ambiguously named 'vm_setup_msi()' and 'vm_setup_msix()' toNeel Natu2013-12-181-4/+4
| | | | | | | | | 'vm_setup_pptdev_msi()' and 'vm_setup_pptdev_msix()' respectively. It should now be clear that these functions operate on passthru devices. Notes: svn path=/head/; revision=259537
* Add an API to deliver message signalled interrupts to vcpus. This allowsNeel Natu2013-12-161-4/+16
| | | | | | | | | | | callers treat the MSI 'addr' and 'data' fields as opaque and also lets bhyve implement multiple destination modes: physical, flat and clustered. Submitted by: Tycho Nightingale (tycho.nightingale@pluribusnetworks.com) Reviewed by: grehan@ Notes: svn path=/head/; revision=259482
* Add HPET device emulation to bhyve.Neel Natu2013-11-251-0/+13
| | | | | | | | | | | | | | bhyve supports a single timer block with 8 timers. The timers are all 32-bit and capable of being operated in periodic mode. All timers support interrupt delivery using MSI. Timers 0 and 1 also support legacy interrupt routing. At the moment the timers are not connected to any ioapic pins but that will be addressed in a subsequent commit. This change is based on a patch from Tycho Nightingale (tycho.nightingale@pluribusnetworks.com). Notes: svn path=/head/; revision=258579
* Add an ioctl to assert and deassert an ioapic pin atomically. This will be usedNeel Natu2013-11-231-0/+11
| | | | | | | | | | | | to inject edge triggered legacy interrupts into the guest. Start using the new API in device models that use edge triggered interrupts: viz. the 8254 timer and the LPC/uart device emulation. Submitted by: Tycho Nightingale (tycho.nightingale@pluribusnetworks.com) Notes: svn path=/head/; revision=258494
* Move the ioapic device model from userspace into vmm.ko. This is needed forNeel Natu2013-11-121-0/+22
| | | | | | | | | | | | | upcoming in-kernel device emulations like the HPET. The ioctls VM_IOAPIC_ASSERT_IRQ and VM_IOAPIC_DEASSERT_IRQ are used to manipulate the ioapic pin state. Discussed with: grehan@ Submitted by: Tycho Nightingale (tycho.nightingale@pluribusnetworks.com) Notes: svn path=/head/; revision=258075
* Add a new capability, VM_CAP_ENABLE_INVPCID, that can be enabled to exposeNeel Natu2013-10-161-0/+1
| | | | | | | | | | | | | | | | | 'invpcid' instruction to the guest. Currently bhyve will try to enable this capability unconditionally if it is available. Consolidate code in bhyve to set the capabilities so it is no longer duplicated in BSP and AP bringup. Add a sysctl 'vm.pmap.invpcid_works' to display whether the 'invpcid' instruction is available. Reviewed by: grehan MFC after: 3 days Notes: svn path=/head/; revision=256645
* Parse the memory size parameter using expand_number() to allow specifyingNeel Natu2013-10-091-0/+27
| | | | | | | | | | | the memory size more intuitively (e.g. 512M, 4G etc). Submitted by: rodrigc Reviewed by: grehan Approved by: re (blanket) Notes: svn path=/head/; revision=256176
* Merge projects/bhyve_npt_pmap into head.Neel Natu2013-10-051-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the amd64/pmap code aware of nested page table mappings used by bhyve guests. This allows bhyve to associate each guest with its own vmspace and deal with nested page faults in the context of that vmspace. This also enables features like accessed/dirty bit tracking, swapping to disk and transparent superpage promotions of guest memory. Guest vmspace: Each bhyve guest has a unique vmspace to represent the physical memory allocated to the guest. Each memory segment allocated by the guest is mapped into the guest's address space via the 'vmspace->vm_map' and is backed by an object of type OBJT_DEFAULT. pmap types: The amd64/pmap now understands two types of pmaps: PT_X86 and PT_EPT. The PT_X86 pmap type is used by the vmspace associated with the host kernel as well as user processes executing on the host. The PT_EPT pmap is used by the vmspace associated with a bhyve guest. Page Table Entries: The EPT page table entries as mostly similar in functionality to regular page table entries although there are some differences in terms of what bits are used to express that functionality. For e.g. the dirty bit is represented by bit 9 in the nested PTE as opposed to bit 6 in the regular x86 PTE. Therefore the bitmask representing the dirty bit is now computed at runtime based on the type of the pmap. Thus PG_M that was previously a macro now becomes a local variable that is initialized at runtime using 'pmap_modified_bit(pmap)'. An additional wrinkle associated with EPT mappings is that older Intel processors don't have hardware support for tracking accessed/dirty bits in the PTE. This means that the amd64/pmap code needs to emulate these bits to provide proper accounting to the VM subsystem. This is achieved by using the following mapping for EPT entries that need emulation of A/D bits: Bit Position Interpreted By PG_V 52 software (accessed bit emulation handler) PG_RW 53 software (dirty bit emulation handler) PG_A 0 hardware (aka EPT_PG_RD) PG_M 1 hardware (aka EPT_PG_WR) The idea to use the mapping listed above for A/D bit emulation came from Alan Cox (alc@). The final difference with respect to x86 PTEs is that some EPT implementations do not support superpage mappings. This is recorded in the 'pm_flags' field of the pmap. TLB invalidation: The amd64/pmap code has a number of ways to do invalidation of mappings that may be cached in the TLB: single page, multiple pages in a range or the entire TLB. All of these funnel into a single EPT invalidation routine called 'pmap_invalidate_ept()'. This routine bumps up the EPT generation number and sends an IPI to the host cpus that are executing the guest's vcpus. On a subsequent entry into the guest it will detect that the EPT has changed and invalidate the mappings from the TLB. Guest memory access: Since the guest memory is no longer wired we need to hold the host physical page that backs the guest physical page before we can access it. The helper functions 'vm_gpa_hold()/vm_gpa_release()' are available for this purpose. PCI passthru: Guest's with PCI passthru devices will wire the entire guest physical address space. The MMIO BAR associated with the passthru device is backed by a vm_object of type OBJT_SG. An IOMMU domain is created only for guest's that have one or more PCI passthru devices attached to them. Limitations: There isn't a way to map a guest physical page without execute permissions. This is because the amd64/pmap code interprets the guest physical mappings as user mappings since they are numerically below VM_MAXUSER_ADDRESS. Since PG_U shares the same bit position as EPT_PG_EXECUTE all guest mappings become automatically executable. Thanks to Alan Cox and Konstantin Belousov for their rigorous code reviews as well as their support and encouragement. Thanks for John Baldwin for reviewing the use of OBJT_SG as the backing object for pci passthru mmio regions. Special thanks to Peter Holm for testing the patch on short notice. Approved by: re Discussed with: grehan Reviewed by: alc, kib Tested by: pho Notes: svn path=/head/; revision=256072
* Remove deprecated APIs to get the total and free memory available to vmm.ko.Neel Natu2013-04-251-24/+0
| | | | | | | | | | | | These APIs were relevant when memory for virtual machine allocation was hard partitioned away from the rest of the system but that is no longer the case. The sysctls that provided this information were garbage collected a while back. Obtained from: NetApp Notes: svn path=/head/; revision=249905
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