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* pci_iov: When pci_iov_detach(9) is called, destroy VF childrenKonstantin Belousov2020-12-181-15/+38
| | | | | | | | | | | | | | | | | instead of bailing out with EBUSY if there are any. If driver module is unloaded, or just device is forcibly detached from the driver, there is no way for driver to correctly unload otherwise. Esp. if there are resources dedicated to the VFs which prevent turning down other resources. Reviewed by: jhb Sponsored by: Mellanox Technologies / NVidia Networking MFC after: 1 week Differential revision: https://reviews.freebsd.org/D27615 Notes: svn path=/head/; revision=368749
* DesignWare PCIe driver: Don't call bus_generic_attach() twice.Michal Meloun2020-12-051-1/+1
| | | | | | | | | | bus_generic_attach() should be called from the attach function of the real implementation, not from the common init function. MFC after: 1 week Notes: svn path=/head/; revision=368364
* Only set the PCI bus end when we are reducing itAndrew Turner2020-11-291-4/+5
| | | | | | | | | | | | | | | | | | | | | We read the bus end value from the _CRS method. On some systems we need to further limit it based on the MCFG table. Support this by setting a default value, then update it if needed in the _CRS table, and finally reduce it if it is past the end of the MCFG tabel. This will allow for both systems that use either method to encode this value. This partially reverts r347929, removing the error printf. Reviewed by: philip Tested by: philip, Andrey Fesenko <f0andrey_gmail.com> MFC after: 2 weeks Sponsored by: Innovate UK Differential Revision: https://reviews.freebsd.org/D27274 Notes: svn path=/head/; revision=368156
* Rename kernel option ACPI_DMAR to IOMMU.Ruslan Bukin2020-09-291-1/+2
| | | | | | | | | | | This is mostly needed for a common arm64/amd64 iommu code. Reviewed by: kib Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D26587 Notes: svn path=/head/; revision=366267
* o Rename acpi_iommu_get_dma_tag() -> iommu_get_dma_tag().Ruslan Bukin2020-09-291-2/+5
| | | | | | | | | | | | | This function isn't ACPI dependent and we may use it on FDT systems as well. o Don't repeat the function declaration, include iommu.h instead. Reviewed by: andrew, kib Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D26584 Notes: svn path=/head/; revision=366257
* pci: clean up empty lines in .c and .h filesMateusz Guzik2020-09-0114-45/+6
| | | | Notes: svn path=/head/; revision=365178
* Enable hw.pci.enable_aspm tunable by default.Alexander Motin2020-08-071-1/+1
| | | | | | | | | | While effects on power saving is only a guess, effects on hot-plug are clearly visible. Lets try to enable it and see what happen. MFC after: 3 months Notes: svn path=/head/; revision=364038
* Add initial driver for ACPI Platform Error Interfaces.Alexander Motin2020-07-272-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | APEI allows platform to report different kinds of errors to OS in several ways. We've found that Supermicro X10/X11 motherboards report PCIe errors appearing on hot-unplug via this interface using NMI. Without respective driver it ended up in kernel panic without any additional information. This driver introduces support for the APEI Generic Hardware Error Source reporting via NMI, SCI or polling. It decodes the reported errors and either pass them to pci(4) for processing or just logs otherwise. Errors marked as fatal still end up in kernel panic, but some more informative. When somebody get to native PCIe AER support implementation both of the reporting mechanisms should get common error recovery code. Since in our case errors happen when the device is already gone, there is nothing to recover, so the code just clears the error statuses, practically ignoring the otherwise destructive NMIs in nicer way. MFC after: 2 weeks Relnotes: yes Sponsored by: iXsystems, Inc. Notes: svn path=/head/; revision=363624
* Add a driver for bcm2838 PCI express controllerAndrew Turner2020-07-062-1/+18
| | | | | | | | | | | | | This adds support for the Broadcom bcm2711 PCI express controller, found on the Raspberry Pi 4 (aka the bcm2838 SoC). The driver has only been developed against the soldered-on VIA XHCI controller and not tested with other end points. Submitted by: Robert Crowston <crowston_protonmail.com> Differential Revision: https://reviews.freebsd.org/D25068 Notes: svn path=/head/; revision=362954
* Add mostly dummy hw.pci.enable_aspm tunable.Alexander Motin2020-06-262-0/+5
| | | | | | | | | | | | | | | | | | | | | | The only thing this tunable enables now is reporting to ACPI _OSC that Active State Power Management and Clock Power Management Capability are "supported" by the OS. I've found that at least some Supermicro server boards do not allow OS to support native PCIe hot-plug unless it reports those capabilities. After spending significant time in PCIe specs I have found very little motivation for that, and none of it applies to those motherboards, not enabling ASPM themselves. So unless OS explicitly wants to save power, I see nothing for it to do there actually. I guess it may get sense to support ASPM when we get Thunderbolt support. Otherwise I have no system with PCIe hot-plug where power saving matters. It would be nice to enable this by default, but I worry that it affect power saving of some laptops, even though I haven't noticed that myself. Notes: svn path=/head/; revision=362661
* Translaate the PCI address when activating a resourceAndrew Turner2020-06-221-28/+54
| | | | | | | | | | | When the PCI address != physical address we need to translate from the former to the latter before passing to the parent to map into the kernels virtual address space. Sponsored by: Innovate UK Notes: svn path=/head/; revision=362493
* Use the correct address when creating pci resourcesAndrew Turner2020-06-191-3/+3
| | | | | | | | | | | | | When the PCI and CPU physical addresses are identical it doesn't matter which is used to create the resources, however on some systems, e.g. qemu armv7 virt, they are different. This leads to a panic as we try to map the wrong physical address into the kernel address space. Reported by: Jenkins via trasz Sponsored by: Innovate UK Notes: svn path=/head/; revision=362397
* Adapt ARMADA8k PCIe driver to newly imported 5.7 DT.Michal Meloun2020-06-191-25/+20
| | | | | | | | | | | - temporarily disable handling with phy, we don't have driver for it yet - always clear cause for administartive interrupt. While I'm in, fix style(9) (mainly whitespace). MFC after: 4 weeks Notes: svn path=/head/; revision=362392
* Revert r362389, it was committed with <patch>.diff instead of <patch>.txt asMichal Meloun2020-06-191-20/+25
| | | | | | | commit log. Notes: svn path=/head/; revision=362391
* diff --git a/sys/dev/pci/pci_dw_mv.c b/sys/dev/pci/pci_dw_mv.cMichal Meloun2020-06-191-25/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | index 06a29fefbdd..571fc00f6c1 100644 --- a/sys/dev/pci/pci_dw_mv.c +++ b/sys/dev/pci/pci_dw_mv.c @@ -64,15 +64,11 @@ __FBSDID("$FreeBSD$"); #define MV_GLOBAL_CONTROL_REG 0x8000 #define PCIE_APP_LTSSM_EN (1 << 2) -//#define PCIE_DEVICE_TYPE_SHIFT 4 -//#define PCIE_DEVICE_TYPE_MASK 0xF -//#define PCIE_DEVICE_TYPE_RC 0x4/ #define MV_GLOBAL_STATUS_REG 0x8008 #define MV_STATUS_RDLH_LINK_UP (1 << 1) #define MV_STATUS_PHY_LINK_UP (1 << 9) - #define MV_INT_CAUSE1 0x801C #define MV_INT_MASK1 0x8020 #define INT_A_ASSERT_MASK (1 << 9) @@ -90,11 +86,7 @@ __FBSDID("$FreeBSD$"); #define MV_ARUSER_REG 0x805C #define MV_AWUSER_REG 0x8060 - - #define MV_MAX_LANES 8 - - struct pci_mv_softc { struct pci_dw_softc dw_sc; device_t dev; @@ -112,7 +104,6 @@ static struct ofw_compat_data compat_data[] = { {NULL, 0}, }; - static int pci_mv_phy_init(struct pci_mv_softc *sc) { @@ -121,18 +112,23 @@ pci_mv_phy_init(struct pci_mv_softc *sc) for (i = 0; i < MV_MAX_LANES; i++) { rv = phy_get_by_ofw_idx(sc->dev, sc->node, i, &(sc->phy[i])); if (rv != 0 && rv != ENOENT) { - device_printf(sc->dev, "Cannot get phy[%d]\n", i); - goto fail; - } - if (sc->phy[i] == NULL) - continue; - rv = phy_enable(sc->phy[i]); - if (rv != 0) { - device_printf(sc->dev, "Cannot enable phy[%d]\n", i); - goto fail; - } - } - return (0); + device_printf(sc->dev, "Cannot get phy[%d]\n", i); +/* XXX revert when phy driver will be implemented */ +#if 0 + goto fail; +#else + continue; +#endif + } + if (sc->phy[i] == NULL) + continue; + rv = phy_enable(sc->phy[i]); + if (rv != 0) { + device_printf(sc->dev, "Cannot enable phy[%d]\n", i); + goto fail; + } + } + return (0); fail: for (i = 0; i < MV_MAX_LANES; i++) { @@ -173,13 +169,14 @@ pci_mv_init(struct pci_mv_softc *sc) /* Enable local interrupts */ pci_dw_dbi_wr4(sc->dev, DW_MSI_INTR0_MASK, 0xFFFFFFFF); pci_dw_dbi_wr4(sc->dev, MV_INT_MASK1, 0xFFFFFFFF); - pci_dw_dbi_wr4(sc->dev, MV_INT_MASK2, 0xFFFFFFFF); + pci_dw_dbi_wr4(sc->dev, MV_INT_MASK2, 0xFFFFFFFD); pci_dw_dbi_wr4(sc->dev, MV_INT_CAUSE1, 0xFFFFFFFF); pci_dw_dbi_wr4(sc->dev, MV_INT_CAUSE2, 0xFFFFFFFF); /* Errors have own interrupt, not yet populated in DTt */ pci_dw_dbi_wr4(sc->dev, MV_ERR_INT_MASK, 0); } + static int pci_mv_intr(void *arg) { struct pci_mv_softc *sc = arg; @@ -188,8 +185,6 @@ static int pci_mv_intr(void *arg) /* Ack all interrups */ cause1 = pci_dw_dbi_rd4(sc->dev, MV_INT_CAUSE1); cause2 = pci_dw_dbi_rd4(sc->dev, MV_INT_CAUSE2); - if (cause1 == 0 || cause2 == 0) - return(FILTER_STRAY); pci_dw_dbi_wr4(sc->dev, MV_INT_CAUSE1, cause1); pci_dw_dbi_wr4(sc->dev, MV_INT_CAUSE2, cause2); Notes: svn path=/head/; revision=362389
* Improve DesignWare PCIe driver:Michal Meloun2020-06-191-11/+3
| | | | | | | | | | | | | - only normal memory window is mandatory, prefetchable memory and I/O windows should be optional - full PCIe configuration space is supported - remove duplicated check from function for accessing configuration space. It is already contained in pci_dw_check_dev() MFC after: 2 weeks Notes: svn path=/head/; revision=362387
* Stop assuming we can print rman_res_t with %lxAndrew Turner2020-06-181-2/+3
| | | | | | | | | | This is not the case on armv6 and armv7, where we also build this driver. Fix by casting through uintmax_t and using %jx. Sponsored by: Innovate UK Notes: svn path=/head/; revision=362295
* Clean up the pci host generic driverAndrew Turner2020-06-174-104/+118
| | | | | | | | | | | | | | - Support Prefetchable Memory. - Use the correct rman when allocating memory and ioports. - Translate PCI addresses in bus_alloc_resource to allow physical addresses that are different than pci addresses. Reviewed by: Robert Crowston <crowston_protonmail.com> Sponsored by: Innovate UK Differential Revision: https://reviews.freebsd.org/D25121 Notes: svn path=/head/; revision=362285
* pci: loosen PCIe hot-plug requirementsChuck Tuffli2020-06-101-9/+1
| | | | | | | | | | | | | | | | | | | | | The original PCIe hot-plug code required a couple of things which cause PCI probing errors on the QEMU Q35 system and possibly physical systems (Dell R6515). Allocate the hot-plug interrupt as shared to support INTx interrupts. The hot-plug interrupt mechanism should normally be MSI as PCIe mandates MSI support, but QEMU's Q35 bridge only provides INTx interrupts. Second, the code required the Electromechanical Interlock (Slot Status EIS) to be engaged if present (Slot Capability EIP). Some platforms including QEMU Q35 set EIP but not EIS. Fix by deleting the check. Reviewed by: imp, mav, jhb MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D24877 Notes: svn path=/head/; revision=362027
* do not enable pci bridge decoding on resume until I/O windows are restoredAndriy Gapon2020-05-292-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI bus driver restores most but not all of a child PCI-PCI bridge configuration. The bridge's I/O windows are restored by pcib driver and that happens later in time. This can be problematic because the Command register is restored before the windows are restored. If the firmware programs the windows incorrectly or even does not program them at all, then the bridge can start claiming I/O cycles that are not intended for it. This will continue until the correct windows are restored. I have observed this problem with a buggy BIOS where after resuming from S3 an I/O port window of a PCI-PCI bridge was configured with zero base and limit causing the bridge to claim 0x0 - 0xFFF port range. That interfered with ACPI port access including ACPI PM Timer at port 0x808, thus wreaking havoc in the time keeping. The solution is to restore the Command register of PCI-PCI bridges after the windows are restored in pcib driver. While here, I decided that for other PCI device types (normal and cardbus) it's better to restore the Command register after their BARs are restored. To do: per jhb's suggestion, move the window handling to pci driver. Reviewed by: imp, jhb, kib MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D25028 Notes: svn path=/head/; revision=361621
* Rename dmar_get_dma_tag() to acpi_iommu_get_dma_tag().Ruslan Bukin2020-05-261-3/+3
| | | | | | | | | | This is needed for a new IOMMU controller support. Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D24943 Notes: svn path=/head/; revision=361532
* Remove PCI_IO_WINDOW_OFFSET from the pci host generic fdt attachment.Andrew Turner2020-04-241-4/+1
| | | | | | | | | | | It doesn't seem to be needed, and breaks booting under bhyve/arm64. Discussed with: br MFC after: 2 weeks Sponsored by: Innovate UK Notes: svn path=/head/; revision=360249
* Remove spurious warning about invalid VPD data.Navdeep Parhar2020-03-181-6/+6
| | | | | | | | | | | | | | | | The warning used to be displayed for valid VPDs about 512B or above in size. Fix the size check and add a break while here so that the routine stops if if detects any problem. Tested with "pciconf -lV" Reviewed by: kib@, jhb@ MFC after: 1 week Sponsored by: Chelsio Communications Differential Revision: https://reviews.freebsd.org/D23679 Notes: svn path=/head/; revision=359057
* Add more values for PCI capabilities, PCIe extended capabilities, and ↵Konstantin Belousov2020-02-201-0/+26
| | | | | | | | | | | | | subclasses. Taken from https://pcisig.com/sites/default/files/files/PCI_Code-ID_r_1_11__v24_Jan_2019.pdf Submitted by: Dmitry Luhtionov <dmitryluhtionov@gmail.com> MFC after: 1 week Notes: svn path=/head/; revision=358174
* Fix typo.Konstantin Belousov2020-02-171-1/+1
| | | | | | | | Sponsored by: The FreeBSD Foundation MFC after: 3 days Notes: svn path=/head/; revision=358021
* Mark more nodes as CTLFLAG_MPSAFE or CTLFLAG_NEEDGIANT (5 of many)Pawel Biernacki2020-02-161-1/+2
| | | | | | | | | | | | | | | r357614 added CTLFLAG_NEEDGIANT to make it easier to find nodes that are still not MPSAFE (or already are but aren’t properly marked). Use it in preparation for a general review of all nodes. This is non-functional change that adds annotations to SYSCTL_NODE and SYSCTL_PROC nodes using one of the soon-to-be-required flags. Reviewed by: imp, kib Approved by: kib (mentor) Differential Revision: https://reviews.freebsd.org/D23633 Notes: svn path=/head/; revision=358004
* Add PCI Express driver for the ARM Neoverse N1 System DevelopmentRuslan Bukin2020-02-113-2/+364
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Platform (N1SDP). Neoverse N1 is a high-performance ARM microarchitecture designed by the ARM Holdings for the server market. The PCI part on N1SDP was shipped untested and suffers from some integration issues. For instance accessing to not existing BDFs causes System Error (SError) exception. To mitigate this, the firmware scans the bus, catches SErrors and creates a table with valid BDFs. That allows us to filter-out accesses to invalid BDFs in this driver. Also the root complex config space (BDF == 0) has an unusual location in memory map, so remapping accesses to it is required. Finally, the config space is restricted to 32-bit accesses only. This was tested on the ARM boxes kindly provided by the ARM Ltd to the DARPA CHERI Project. In collaboration with: andrew Reviewed by: andrew Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D23349 Notes: svn path=/head/; revision=357762
* o Move the software context struct to a header file.Ruslan Bukin2020-01-242-6/+49
| | | | | | | | | | | | o Make the pci_host_generic_acpi_attach() globally visible. o Declare a new driver class. These will be used by a new PCI root complex driver. Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=357085
* Move the ECAM macroses to the header file.Ruslan Bukin2020-01-242-17/+17
| | | | | | | | | These will be used by other PCI root complex drivers. Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=357083
* Abstract the locking for PCIe hotplug. It still uses Giant so there'sScott Long2019-12-262-6/+14
| | | | | | | no functional change yet. Notes: svn path=/head/; revision=356098
* Remove VMware MSI-X from the PCI blacklist.Mark Peek2019-12-181-7/+0
| | | | | | | | | | | | | | | | First reported against ESXi 5.0, PCI passthrough was not working due to MSI-X issues. However, this issue was fixed via patch releases against ESXi 5.5 and 6.0 in 2016. Given ESXi 5.5 and earlier have been EOL, this patch removes the VMware MSI-X blacklist entries in the quirk table. PR: 203874 Reviewed by: imp, jhb MFC after: 1 month Sponsored by: VMware Differential Revision: https://reviews.freebsd.org/D22819 Notes: svn path=/head/; revision=355889
* Add accessors for the Vendor Specific Extended Capability (VSEC)Scott Long2019-12-131-0/+7
| | | | | | | | | | | | | Parse out the VSEC. If the user invokes a second -c command line option, do a hex dump of the vendor data. Reviewed by: imp MFC after: 3 days Sponsored by: Intel Differential Revision: http://reviews.freebsd.org/D22808 Notes: svn path=/head/; revision=355741
* Remove "All rights reserved" phrase from copyright notes.Stefan Eßer2019-12-044-8/+4
| | | | | | | | | | | | | | | | | | | | With the ratification of the Berne Convention in 2000, it became obsolete. I have removed that phrase and the "(c)" only from files without copyright claims by other parties. There are 2 files (pci.c, pci_private.h) that are also claimed by Michael Smith <msmith@freebsd.org> and by BSDi, which have therefore not been included in this commit. When all member nations of the Buenos Aires Convention adopted the Berne Convention, the phrase "All rights reserved" became unnecessary to assert copyright. Remove it from files under my copyright. There are 2 files (pci.c, pci_private.h) that) that do also bear msmith's and BSDi's copyright. I have left them unchanged for now, since I do not know whether they (or the legal successor in case of BSDi) would agree. Notes: svn path=/head/; revision=355382
* Hoist locking giant back up into the ioctl handlerWarner Losh2019-11-242-5/+9
| | | | | | | | | | | Move the locking back into the ioctl handler. This "fixes" the race where we hve a hot plug event just after the dropping of Giant in pci_find_dbsf, assuming the driver doesn't then call anything that drops and picks up Giant again... It's a little safer since don't think it doesn't, but we lack the tools to know for sure. Notes: svn path=/head/; revision=355057
* Push Giant down one layerWarner Losh2019-11-232-4/+7
| | | | | | | | | | | | | | | | | The /dev/pci device doesn't need GIANT, per se. However, one routine that it calls, pci_find_dbsf implicitly does. It walks a list that can change when PCI scans a new bus. With hotplug, this means we could have a race with that scanning. To prevent that, take out Giant around scanning the list. However, given that we have places in the tree that drop giant, if held when we call into them, the whole use of Giant to protect newbus may be less effective that we desire, so add a comment about why we're talking it out, and we'll address the issue when we lock newbus with something other than Giant. Notes: svn path=/head/; revision=355037
* Add driver for DesignWare PCIE core, and its Armada 8K specific attachement.Michal Meloun2019-10-204-0/+1256
| | | | | | | MFC after: 3 weeks Notes: svn path=/head/; revision=353774
* Export pci_attach() and pci_detach().John Baldwin2019-10-152-4/+4
| | | | | | | | | Reviewed by: imp MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D21948 Notes: svn path=/head/; revision=353585
* pcie: return an error if a matching resource is not foundEd Maste2019-09-051-1/+1
| | | | | | | | | | | Submitted by: markj Reviewed by: manu Event: vBSDCon FreeBSD hackathon Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D20884 Notes: svn path=/head/; revision=351867
* Don't consider PCIe hot-plug command timeout fatal.Alexander Motin2019-08-261-5/+2
| | | | | | | | | | | | | | | | | According to my tests and errata to several generations of Intel CPUs, PCIe hot-plug command completion reporting is not very reliable thing. At least on my Supermicro X11DPi-NT board I never saw it reported. Before this change timeout code detached devices and tried to disable the slot, that in my case resulted in hot-plugged device being detached just a second after it was successfully detected and attached. This change removes that, so in case of timeout it just prints the error and continue operation. Linux does the same. MFC after: 1 week Sponsored by: iXsystems, Inc. Notes: svn path=/head/; revision=351514
* Fix the build after r350570.Justin Hibbits2019-08-041-1/+1
| | | | | | | Signed char cannot compare to values above 0x7f. Use unsigned instead. Notes: svn path=/head/; revision=350571
* Add necessary bits for Linux KPI to work correctly on powerpcJustin Hibbits2019-08-041-6/+117
| | | | | | | | | | | | | | | | | | | | | PowerPC, and possibly other architectures, use different address ranges for PCI space vs physical address space, which is only mapped at resource activation time, when the BAR gets written. The DRM kernel modules do not activate the rman resources, soas not to waste KVA, instead only mapping parts of the PCI memory at a time. This introduces a BUS_TRANSLATE_RESOURCE() method, implemented in the Open Firmware/FDT PCI driver, to perform this necessary translation without activating the resource. In addition to system KPI changes, LinuxKPI is updated to handle a big-endian host, by adding proper endian swaps to the I/O functions. Submitted by: mmacy Reported by: hselasky Differential Revision: https://reviews.freebsd.org/D21096 Notes: svn path=/head/; revision=350570
* Work around devices which return all zeros for reads of existing MSI-XWarner Losh2019-07-081-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | table VCTRL registers. Unconditionally program the MSI-X vector control Mask field for MSI-X table entries without regarud for Mask's previous value. Some devices return all zeros on reads of the VCTRL registers, which would cause us to skip disabling interrupts. This fixes the Samsung SM961/PM961 SSDs which are return zero starting from offset 0x3084 within the memory region specified by BAR0, even when they are active MSI-X vectors. The Illumos kernel writes these unconditionally to 0 or 1. However, section 6.8.2.9 of the PCI Local Bus 3.0 spec (dated Feb 3, 2004) states for bits 31::01: After reset, the state of these bits must be 0. However, for potential future use, software must preserve the value of these reserved bits when modifying the value of other Vector Control bits. If software modifies the value of these reserved bits, the result is undefined." so we always set or clear the Mask bit, but otherwise preserves the old value. PR: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=211713 Reviewed By: imp, jhb Submitted by: Ka Ho Ng MFC After: 1 week Differential Revision: https://reviews.freebsd.org/D20873 Notes: svn path=/head/; revision=349845
* Need to apply the PCIM_BAR_MEM_BASE mask to the physical memoryHans Petter Selasky2019-06-281-3/+5
| | | | | | | | | | | | address before returning it to the user. Some of the least significant bits have special meaning and should be masked away. Discussed with: kib@ MFC after: 3 days Sponsored by: Mellanox Technologies Notes: svn path=/head/; revision=349522
* Only respond to the PCIe Attention Button if a device is already plugged in.Colin Percival2019-06-051-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to this commit, if PCIEM_SLOT_STA_ABP and PCIEM_SLOT_STA_PDC are asserted simultaneously, FreeBSD sets a 5 second "hardware going away" timer and then processes the "presence detect" change. In the (physically challenging) case that someone presses the "attention button" and inserts a new PCIe device at exactly the same moment, this results in FreeBSD recognizing that the device is present, attaching it, and then detaching it 5 seconds later. On EC2 "bare metal" hardware this is the precise sequence of events which takes place when a new EBS volume is attached; virtual machines have no difficulty effecting physically implausible simultaneity. This patch changes the handling of PCIEM_SLOT_STA_ABP to only detach a device if the presence of a device was detected *before* the interrupt which reports the Attention Button push. Reported by: Matt Wilson Reviewed by: jhb MFC after: 1 week Sponsored by: https://www.patreon.com/cperciva Differential Revision: https://reviews.freebsd.org/D20499 Notes: svn path=/head/; revision=348681
* Pass pci_base address instead of physical address to rman_manage_region().Ruslan Bukin2019-05-291-3/+3
| | | | | | | | | | This should had been part of r347930 ("pci: ecam: Correctly parse memory and IO region"). Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=348363
* Extract eventfilter declarations to sys/_eventfilter.hConrad Meyer2019-05-204-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | This allows replacing "sys/eventfilter.h" includes with "sys/_eventfilter.h" in other header files (e.g., sys/{bus,conf,cpu}.h) and reduces header pollution substantially. EVENTHANDLER_DECLARE and EVENTHANDLER_LIST_DECLAREs were moved out of .c files into appropriate headers (e.g., sys/proc.h, powernv/opal.h). As a side effect of reduced header pollution, many .c files and headers no longer contain needed definitions. The remainder of the patch addresses adding appropriate includes to fix those files. LOCK_DEBUG and LOCK_FILE_LINE_ARG are moved to sys/_lock.h, as required by sys/mutex.h since r326106 (but silently protected by header pollution prior to this change). No functional change (intended). Of course, any out of tree modules that relied on header pollution for sys/eventhandler.h, sys/lock.h, or sys/mutex.h inclusion need to be fixed. __FreeBSD_version has been bumped. Notes: svn path=/head/; revision=347984
* pci: ecam: Correctly parse memory and IO regionEmmanuel Vadot2019-05-172-8/+7
| | | | | | | | | | | | When activating a resource do not compare the resource id to the adress. Treat IO region as MEMORY region too. Submitted by: Tuan Phan <tphan@amperecomputing.com> (Original Version) Sponsored by: Ampere Computing, LLC Differential Revision: https://reviews.freebsd.org/D20214 Notes: svn path=/head/; revision=347930
* pci: ecam: Do not warn on mismatch of bus_endEmmanuel Vadot2019-05-171-8/+4
| | | | | | | | | | | | | | We cannot know the bus end number before parsing the MCFG table so don't set the bus_end before that. If the MCFG table doesn't exist we will set the configuration base address based on the _CBA value and set the bus_end to the maximal number allowed by PCI. Sponsored by: Ampere Computing, LLC Differential Revision: https://reviews.freebsd.org/D20213 Notes: svn path=/head/; revision=347929
* remove the 4GB boundary requirement on PCI DMA segmentsTycho Nightingale2019-04-192-28/+1
| | | | | | | | | | Reviewed by: kib Discussed with: jhb Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D19867 Notes: svn path=/head/; revision=346386
* Give new home to the comment from ppt_pci_reset(), explaining a nuanceKonstantin Belousov2019-04-071-0/+5
| | | | | | | | | | | of power reset. Noted by: soralx@cydem.org Sponsored by: Mellanox Technologies MFC after: 12 days Notes: svn path=/head/; revision=345997
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