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* Add CFI start/end proc directives to arm64, i386, and ppcConrad Meyer2020-12-051-1/+2
| | | | | | | | | | | | | | Follow-up to r353959 and r368070: do the same for other architectures. arm32 already seems to use its own .fnstart/.fnend directives, which appear to be ARM-specific variants of the same thing. Likewise, MIPS uses .frame directives. Reviewed by: arichardson Differential Revision: https://reviews.freebsd.org/D27387 Notes: svn path=/head/; revision=368354
* Implement superpages for PowerPC64 (HPT)Leandro Lupori2020-11-061-35/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | This change adds support for transparent superpages for PowerPC64 systems using Hashed Page Tables (HPT). All pmap operations are supported. The changes were inspired by RISC-V implementation of superpages, by @markj (r344106), but heavily adapted to fit PPC64 HPT architecture and existing MMU OEA64 code. While these changes are not better tested, superpages support is disabled by default. To enable it, use vm.pmap.superpages_enabled=1. In this initial implementation, when superpages are disabled, system performance stays at the same level as without these changes. When superpages are enabled, buildworld time increases a bit (~2%). However, for workloads that put a heavy pressure on the TLB the performance boost is much bigger (see HPC Challenge and pgbench on D25237). Reviewed by: jhibbits Sponsored by: Eldorado Research Institute (eldorado.org.br) Differential Revision: https://reviews.freebsd.org/D25237 Notes: svn path=/head/; revision=367417
* [PowerPC64LE] Fix endianness issues in phyp_vscsi.Brandon Bergren2020-09-231-31/+40
| | | | | | | | | | | | | Unlike virtio, which in legacy mode is guest endian, the hypervisor vscsi interface operates in big endian, so we must convert back and forth in several places. These changes are enough to attach a rootdisk. Sponsored by: Tag1 Consulting, Inc. Notes: svn path=/head/; revision=366038
* [PowerPC64LE] Fix endianness issues in phyp and opal consoles.Brandon Bergren2020-09-231-2/+8
| | | | | | | | | | This applies to both pseries and powernv, which were tested at different points during the patchset development. Sponsored by: Tag1 Consulting, Inc. Notes: svn path=/head/; revision=366036
* [PowerPC64LE] Tell the hypervisor to switch interrupts to LE at CHRP attach.Brandon Bergren2020-09-232-0/+28
| | | | | | | | | | Since we will need to be able to take traps relatively early in the process, ensure that the hypervisor changes our ILE for us as soon as we are ready. Sponsored by: Tag1 Consulting, Inc. Notes: svn path=/head/; revision=366035
* [PowerPC64LE] LE bringup work: locore / machdep / platformBrandon Bergren2020-09-221-1/+2
| | | | | | | | | | This is the initial LE changes required in the machdep code to get as far as platform attachment on qemu pseries. Sponsored by: Tag1 Consulting, Inc. Notes: svn path=/head/; revision=366033
* powerpc: clean up empty lines in .c and .h filesMateusz Guzik2020-09-0113-38/+20
| | | | Notes: svn path=/head/; revision=365073
* powerpc/mmu: Convert PowerPC pmap drivers to ifunc from kobjJustin Hibbits2020-05-271-35/+39
| | | | | | | | | | | | | With IFUNC support in the kernel, we can finally get rid of our poor-man's ifunc for pmap, utilizing kobj. Since moea64 uses a second tier kobj as well, for its own private methods, this adds a second pmap install function (pmap_mmu_init()) to perform pmap 'post-install pre-bootstrap' initialization, before the IFUNCs get initialized. Reviewed by: bdragon Notes: svn path=/head/; revision=361544
* This is Ethernet driver so mark the interrupt appropriately.Gleb Smirnoff2020-01-231-1/+1
| | | | Notes: svn path=/head/; revision=357011
* Enable use of ofwcons for early debugLeandro Lupori2019-12-091-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | This change enables the use of OpenFirmware Console (ofwcons), even when VGA is available, allowing early kernel messages to be seen, that is important in case of crashes before VGA console initialization. This is specially useful in virtualized environments, where the user/developer doesn't have full control of the virtualization engine (e.g. OpenStack). The old behavior is preserved by default and, in order to use ofwcons, a few tunables that have been introduced need to be set: - hw.ofwfb.disable=1 - disable OFW FrameBuffer device - machdep.ofw.mtx_spin=1 - change PPC OFW mutex to SPIN type, to match kernel console's mutex type - debug.quiesce_ofw=0 - don't call OFW quiesce, needed to keep ofwcons I/O working More details can be found at differential revision D20640. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D20640 Notes: svn path=/head/; revision=355556
* [PPC64] Enable opal console use as a GDB DBGPORTLeandro Lupori2019-12-091-1/+1
| | | | | | | | | | | | | | This change makes it possible to use OPAL console as a GDB debug port. Similar to uart and uart_phyp debug ports, it has to be enabled by setting the hw.uart.dbgport variable to the serial console node of the device tree. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D22649 Notes: svn path=/head/; revision=355555
* [PPC] Remove extra \0 char inserted on vty by QEMULeandro Lupori2019-11-291-4/+25
| | | | | | | | | | | | | | Since version 2.11.0, QEMU became bug-compatible with PowerVM's vty implementation, by inserting a \0 after every \r going to the guest. Guests are expected to workaround this issue by removing every \0 immediately following a \r. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D22171 Notes: svn path=/head/; revision=355209
* [PPC64] Enable phyp vty use as a GDB DBGPORTLeandro Lupori2019-11-251-0/+163
| | | | | | | | | | | | | | | This change makes it possible to use a POWER Hypervisor virtual terminal device (phyp vty) as a GDB debug port. Similar to the uart debug port, it has to be enabled by setting the hw.uart_phyp.dbgport variable to the vty node of the device tree. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D22205 Notes: svn path=/head/; revision=355093
* Convert to if_foreach_llmaddr() KPI.Gleb Smirnoff2019-10-211-13/+13
| | | | Notes: svn path=/head/; revision=353867
* [PPC64] Initial kernel minidump implementationLeandro Lupori2019-10-141-0/+32
| | | | | | | | | | | | | Based on POWER9BSD implementation, with all POWER9 specific code removed and addition of new methods in PPC64 MMU interface, to isolate platform specific code. Currently, the new methods are implemented on pseries and PowerNV (D21643). Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D21551 Notes: svn path=/head/; revision=353489
* powerpc/pmap64: Make moea64 statistics optionalJustin Hibbits2019-07-251-2/+2
| | | | | | | | | | | | | | | | | | Summary: It turns out statistics accounting is very expensive in the pmap driver, and doesn't seem necessary in the common case. Make this optional behind a MOEA64_STATS #define, which one can set if they really need statistics. This saves ~7-8% on buildworld time on a POWER9. Found by bdragon. Reviewed by: luporl Differential Revision: https://reviews.freebsd.org/D20903 Notes: svn path=/head/; revision=350313
* [PPC64] pseries: fix realmaxaddr calculationLeandro Lupori2019-07-101-1/+8
| | | | | | | | | | | | On POWER9/pseries, QEMU passes several regions of memory, instead of a single region containing all memory, as the code was expecting. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D20857 Notes: svn path=/head/; revision=349885
* [PPC64] pseries llan: fix MAC addressLeandro Lupori2019-07-041-2/+11
| | | | | | | | | | | | | | | | | | | | | There was an issue in pseries llan driver, that resulted in the first 2 bytes of the MAC address getting stripped, and the last 2 being always 0. In most cases the network interface still worked, despite the MAC being different of what was specified to QEMU, but when some other host or DHCP server expected a specific MAC, this would fail. This change fixes this by shifting right by 2 the local-mac-address read from device tree, if its length is 6 instead of 8, as observed in QEMU DT, that always presents a 6 bytes value for this property. PR: 237471 Reported by: Alfredo Dal'Ava Junior Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D20843 Notes: svn path=/head/; revision=349723
* [PPC] Fix build error when POWERNV is disabledLeandro Lupori2019-06-111-1/+1
| | | | | | | | | | | | When building a kernel supporting PSERIES but not POWERNV, the compiler would complain about an error variable being possibly used before being initialized. In practice, however, this should never happen. In any case, it is now initialized to an error value. Notes: svn path=/head/; revision=348900
* [PPC64] Support QEMU/KVM pseries without hugepagesLeandro Lupori2019-06-071-7/+40
| | | | | | | | | | | | | | | | This set of changes make it possible to run FreeBSD for PowerPC64/pseries, under QEMU/KVM, without requiring the host to make hugepages available to the guest. While there was already this possibility, by means of setting hw_direct_map to 0, on PowerPC64 there were a couple of issues/wrong assumptions that prevented this from working, before this changelist. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D20522 Notes: svn path=/head/; revision=348783
* Extract eventfilter declarations to sys/_eventfilter.hConrad Meyer2019-05-202-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | This allows replacing "sys/eventfilter.h" includes with "sys/_eventfilter.h" in other header files (e.g., sys/{bus,conf,cpu}.h) and reduces header pollution substantially. EVENTHANDLER_DECLARE and EVENTHANDLER_LIST_DECLAREs were moved out of .c files into appropriate headers (e.g., sys/proc.h, powernv/opal.h). As a side effect of reduced header pollution, many .c files and headers no longer contain needed definitions. The remainder of the patch addresses adding appropriate includes to fix those files. LOCK_DEBUG and LOCK_FILE_LINE_ARG are moved to sys/_lock.h, as required by sys/mutex.h since r326106 (but silently protected by header pollution prior to this change). No functional change (intended). Of course, any out of tree modules that relied on header pollution for sys/eventhandler.h, sys/lock.h, or sys/mutex.h inclusion need to be fixed. __FreeBSD_version has been bumped. Notes: svn path=/head/; revision=347984
* [PPC64] Fix wrong KASSERT in mphyp_pte_insert()Leandro Lupori2019-04-231-1/+1
| | | | | | | | | | | | | | | | | | As mphyp_pte_unset() can also remove PTE entries, and as this can happen in parallel with PTEs evicted by mphyp_pte_insert(), there is a (rare) chance the PTE being evicted gets removed before mphyp_pte_insert() is able to do so. Thus, the KASSERT should check wether the result is H_SUCCESS or H_NOT_FOUND, to avoid panics if the situation described above occurs. More details about this issue can be found in PR 237470. PR: 237470 Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D20012 Notes: svn path=/head/; revision=346600
* [PowerPC64] pseries-llan: increment packet output counters on error and successJustin Hibbits2019-04-231-2/+6
| | | | | | | | | | | | Summary: when using pseries-llan driver, Opkts and Oerrs counters (netstat -i) are always zero. This patch adds an small error handling to increment these counters. Submitted by: alfredo.junior_eldorado.org.br Differential Revision: https://reviews.freebsd.org/D20009 Notes: svn path=/head/; revision=346590
* powerpc64/pseries: Fix hypervisor call with extra argumentsJustin Hibbits2019-04-231-0/+5
| | | | | | | | | | | | | | | | Some hypervisor calls, such as H_SEND_LOGICAL_LAN, take more arguments than are traditionally passed in registers. The HCALL ABI will accept these arguments in r11 and r12. With ELFv2 ABI, these arguments are 2 double-words lower than ELFv1 ABI, as two double-words in the stack frame are no longer used, and therefore removed from the frame. Fix the offsets for loading the registers for the HCALL. This fixes the phyp_llan driver with ELFv2 kernel. Submitted by: alfredo.junior_eldorado.org.br Differential Revision: https://reviews.freebsd.org/D20008 Notes: svn path=/head/; revision=346589
* [ppc64] llan: fix fatal kernel trap when system is low on memoryLeandro Lupori2019-02-051-2/+0
| | | | | | | | | | | | | | | | | | When running several builders in parallel, on QEMU, with 8GB of memory, a fatal kernel trap (0x300 (data storage interrupt)) caused by llan driver is sometimes observed, when the system starts to run out of swap space. This happens because, at llan_intr(), a phyp call to add a logical LAN buffer is always made when llan_add_rxbuf() fails, even if it fails to allocate a new buffer. PR: 235489 Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D19084 Notes: svn path=/head/; revision=343791
* powerpc/powernv: Add a driver for the POWER9 XIVE interrupt controllerJustin Hibbits2019-02-021-6/+9
| | | | | | | | | | | | | | | | | The XIVE (External Interrupt Virtualization Engine) is a new interrupt controller present in IBM's POWER9 processor. It's a very powerful, very complex device using queues and shared memory to improve interrupt dispatch performance in a virtualized environment. This yields a ~10% performance improvment over the XICS emulation mode, measured in both buildworld, and 'dd' from nvme to /dev/null. Currently, this only supports native access. MFC after: 1 month Notes: svn path=/head/; revision=343674
* powerpc: Fix opaque irq data initializationJustin Hibbits2019-01-191-12/+16
| | | | | | | | | | | | The powerpc_intr structure is not zero-initialized, so on an invariants build would panic in the xics driver with an invalid pointer. Also fix the xics driver to share the private data setup code between xics_enable() and xics_bind(). Reported by: Leonardo Bianconi Notes: svn path=/head/; revision=343167
* powerpc/pseries: Cache the IPI vector to avoid the common static lookupJustin Hibbits2019-01-121-8/+13
| | | | | | | | | | | | The IPI vector is static, and happens to be the most common interrupt by far on some systems. Rather than searching for the interrupt every time, cache the index. This appears to yield a small performance boost, of about 8% reduction in buildworld times, on my POWER9 system, when paired with r342975. Notes: svn path=/head/; revision=342976
* powerpc: Add opaque 'private data' to interrupt vectorsJustin Hibbits2019-01-121-51/+44
| | | | | | | | | | The XICS and XIVE need extra data beyond irq and vector. Rather than performing a separate search, it's better for the general interrupt facility to hold a private pointer, since the search already must be done anyway at that level. Notes: svn path=/head/; revision=342975
* powerpc: Fix regression introduced in r342771Conrad Meyer2019-01-071-10/+18
| | | | | | | | | | | | | | | | | | | | | In r342771, I introduced a regression in Power by abusing the platform smp_topo() method as a shortcut for providing the MI information needed for the stated sysctls. The smp_topo() method was already called later by sched_ule (under the name cpu_topo()), and initializes a static array of scheduler topology information. I had skimmed the smp_topo_foo() functions and assumed they were idempotent; empirically, they are not (or at least, detect re-initialization and panic). Do the cleaner thing I should have done in the first place and add a platform method specifically for core- and thread-count probing. Reported by: luporl via jhibbits Reviewed by: luporl X-MFC-With: r342771 Differential Revision: https://reviews.freebsd.org/D18777 Notes: svn path=/head/; revision=342852
* Expose threads-per-core and physical core count informationConrad Meyer2019-01-041-0/+3
| | | | | | | | | | | | | | With new sysctls (to the best of our ability do detect them). Restructured smp.4 slightly for clarity (keep relevant stuff closer to the top) while documenting. Reviewed by: markj, jhibbits (ppc parts) MFC after: 3 days Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D18322 Notes: svn path=/head/; revision=342771
* powerpc64/xics: Fix comment typoJustin Hibbits2018-10-211-1/+1
| | | | Notes: svn path=/head/; revision=339519
* powerpc/pseries: EOI interrupts in XICS by setting lowest priorityJustin Hibbits2018-10-061-11/+3
| | | | | | | | | | | | | | | Discussing with Benjamin Herrenschmidt, OPAL_INT_GET_XIRR masks the returned priority, so must be resumed before more interrupts can be handled at this priority. Since there are only two priorities used in FreeBSD, we know that the previous priority in an EOI will always be 0xff (lowest priority). Reviewed by: nwhitehorn Approved by: re(rgrimes) Differential Revision: https://reviews.freebsd.org/D17361 Notes: svn path=/head/; revision=339215
* Add a comment explaining the need of a global temporary variableJustin Hibbits2018-05-221-0/+9
| | | | | | | | | | cpu_xirr is used only as a temporary location for the OPAL call in PIC_DISPATCH(). Requested by: nwhitehorn Notes: svn path=/head/; revision=334014
* Fix build with PSERIES but not POWERNV defined.Nathan Whitehorn2018-05-201-0/+2
| | | | Notes: svn path=/head/; revision=333934
* Add support for the XIVE XICS emulation mode for POWER9 systemsJustin Hibbits2018-05-201-20/+94
| | | | | | | | | | | | | | | | | | | Summary: POWER9 systems use a new interrupt controller, XIVE, managed through OPAL firmware calls. The OPAL firmware includes support for emulating the previous generation XICS presentation layer in addition to a new "XIVE Exploitation" mode. As a stopgap until we have XIVE exploitation mode, enable XICS emulation mode so that we at least have an interrupt controller. Since the CPPR is local to the current CPU, it cannot be updated for APs when initializing on the BSP. This adds a new function, directly called by the powernv platform code, to initialize the CPPR on AP bringup. Reviewed by: nwhitehorn Differential Revision: https://reviews.freebsd.org/D15492 Notes: svn path=/head/; revision=333912
* ifnet: Replace if_addr_lock rwlock with epoch + mutexMatt Macy2018-05-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Run on LLNW canaries and tested by pho@ gallatin: Using a 14-core, 28-HTT single socket E5-2697 v3 with a 40GbE MLX5 based ConnectX 4-LX NIC, I see an almost 12% improvement in received packet rate, and a larger improvement in bytes delivered all the way to userspace. When the host receiving 64 streams of netperf -H $DUT -t UDP_STREAM -- -m 1, I see, using nstat -I mce0 1 before the patch: InMpps OMpps InGbs OGbs err TCP Est %CPU syscalls csw irq GBfree 4.98 0.00 4.42 0.00 4235592 33 83.80 4720653 2149771 1235 247.32 4.73 0.00 4.20 0.00 4025260 33 82.99 4724900 2139833 1204 247.32 4.72 0.00 4.20 0.00 4035252 33 82.14 4719162 2132023 1264 247.32 4.71 0.00 4.21 0.00 4073206 33 83.68 4744973 2123317 1347 247.32 4.72 0.00 4.21 0.00 4061118 33 80.82 4713615 2188091 1490 247.32 4.72 0.00 4.21 0.00 4051675 33 85.29 4727399 2109011 1205 247.32 4.73 0.00 4.21 0.00 4039056 33 84.65 4724735 2102603 1053 247.32 After the patch InMpps OMpps InGbs OGbs err TCP Est %CPU syscalls csw irq GBfree 5.43 0.00 4.20 0.00 3313143 33 84.96 5434214 1900162 2656 245.51 5.43 0.00 4.20 0.00 3308527 33 85.24 5439695 1809382 2521 245.51 5.42 0.00 4.19 0.00 3316778 33 87.54 5416028 1805835 2256 245.51 5.42 0.00 4.19 0.00 3317673 33 90.44 5426044 1763056 2332 245.51 5.42 0.00 4.19 0.00 3314839 33 88.11 5435732 1792218 2499 245.52 5.44 0.00 4.19 0.00 3293228 33 91.84 5426301 1668597 2121 245.52 Similarly, netperf reports 230Mb/s before the patch, and 270Mb/s after the patch Reviewed by: gallatin Sponsored by: Limelight Networks Differential Revision: https://reviews.freebsd.org/D15366 Notes: svn path=/head/; revision=333813
* No need to bzero splpar_vpa entriesJustin Hibbits2018-05-111-1/+0
| | | | | | | | | splpar_vpa is in the BSS, so is already zeroed when the kernel starts up. Tested by: Leandro Lupori Notes: svn path=/head/; revision=333478
* Fix PPC symbol resolutionJustin Hibbits2018-05-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: There were 2 issues that were preventing correct symbol resolution on PowerPC/pseries: 1- memory corruption at chrp_attach() - this caused the inital part of the symbol table to become zeroed, which would cause the kernel linker to fail to parse it. (this was probably zeroing out other memory parts as well) 2- DDB symbol resolution wasn't working because symtab contained not relocated addresses but it was given relocated offsets. Although relocating the symbol table fixed this, it broke the linker, that already handled this case. Thus, the fix for this consists in adding a new DDB macro: DB_STOFFS(offs) that converts a (potentially) relocated offset into one that can be compared with symbol table values. PR: 227093 Submitted by: Leandro Lupori <leandro.lupori_gmail.com> Differential Revision: https://reviews.freebsd.org/D15372 Notes: svn path=/head/; revision=333447
* Fix wrong cpu0 identificationJustin Hibbits2018-05-081-11/+75
| | | | | | | | | | | | | | | | | | | | | Summary: chrp_cpuref_init() was relying on the boot strap processor to be the first child of /cpus. That was not always the case, specially on pseries with FDT. This change uses the "reg" property of each CPU instead and also adds several sanity checks to avoid unexpected behavior (maybe too many panics?). The main observed symptom was interrupts being missed by the main processor, leading to timeouts and the kernel aborting the boot. Submitted by: Leandro Lupori Reviewed by: nwhitehorn Differential Revision: https://reviews.freebsd.org/D15174 Notes: svn path=/head/; revision=333363
* Add support for powernv POWER9 MMU initializationJustin Hibbits2018-05-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The POWER9 MMU (PowerISA 3.0) is slightly different from current configurations, using a partition table even for hypervisor mode, and dropping the SDR1 register. Key off the newly early-enabled CPU features flags for the new architecture, and configure the MMU appropriately. The POWER9 MMU ignores the "PSIZ" field in the PTCR, and expects a 64kB table. As we are enabled for powernv (hypervisor mode, no VMs), only initialize partition table entry 0, and zero out the rest. The actual contents of the register are identical to SDR1 from previous architectures. Along with this, fix a bug in the page table allocation with very large memory. The table can be allocated on any 256k boundary. The bootstrap_alloc alignment argument is an int, and with large amounts of memory passing the size of the table as the alignment will overflow an integer. Hard-code the alignment at 256k as wider alignment is not necessary. Reviewed by: nwhitehorn Tested by: Breno Leitao Relnotes: Yes Notes: svn path=/head/; revision=333273
* [ofw] fix errneous checks for OF_finddevice(9) return valueOleksandr Tymoshenko2018-03-201-1/+1
| | | | | | | | | | | | | | | OF_finddevices returns ((phandle_t)-1) in case of failure. Some code in existing drivers checked return value to be equal to 0 or less/equal to 0 which is also wrong because phandle_t is unsigned type. Most of these checks were for negative cases that were never triggered so trhere was no impact on functionality. Reviewed by: nwhitehorn MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D14645 Notes: svn path=/head/; revision=331229
* Merge AIM and Book-E PCPU fieldsJustin Hibbits2018-02-171-1/+1
| | | | | | | | | | This is part of a long-term goal of merging Book-E and AIM into a single GENERIC kernel. As more work is done, the struct may be optimized further. Reviewed by: nwhitehorn Notes: svn path=/head/; revision=329469
* PPC64: Get the timestap from the proper OF fieldJustin Hibbits2018-02-141-3/+15
| | | | | | | | | | | | | | | | | | | | Summary: After revision rS328534('PPC64: use hwref instead of cpuid'), FreeBSD on powerpc64 virtual machine panics since it is unable to read the timebase, showing the following error: get-property for timebase-frequency on zero phandle panic: Unable to determine timebase frequency! With the change above, cpuref->cr_hwref does not contain the phandle anymore, thus, it never reads the proper CPU entry in OF. Submitted by: Breno Leitao Differential Revision: https://reviews.freebsd.org/D14204 Notes: svn path=/head/; revision=329258
* powerpc64/pseries: Define new hcallsJustin Hibbits2018-02-141-1/+19
| | | | | | | | | | | | | | Summary: Define new hcalls as in 'Linux on Power Architecture Platform Reference' version 1.1 (24 March 2016) downloaded from: https://members.openpowerfoundation.org/document/dl/469 Submitted by: Breno Leitao Differential Revision: https://reviews.freebsd.org/D14281 Notes: svn path=/head/; revision=329257
* PPC64: use hwref instead of cpuidWojciech Macek2018-01-292-100/+79
| | | | | | | | | | | | | | On CHRP and PowerNV, use the interrupt server number in the cpuref and pcpu hwref field instead of the device-tree phandle and make the CPU IDs reported to the scheduler dense and with the BSP at 0. Submitted by: Wojciech Macek <wma@semihalf.com> Obtained from: Semihalf Sponsored by: IBM, QCM Technologies Differential revision: https://reviews.freebsd.org/D14011 Notes: svn path=/head/; revision=328534
* Revert r327828, r327949, r327953, r328016-r328026, r328041:Pedro F. Giffuni2018-01-211-2/+2
| | | | | | | | | | | | | | | | | | Uses of mallocarray(9). The use of mallocarray(9) has rocketed the required swap to build FreeBSD. This is likely caused by the allocation size attributes which put extra pressure on the compiler. Given that most of these checks are superfluous we have to choose better where to use mallocarray(9). We still have more uses of mallocarray(9) but hopefully this is enough to bring swap usage to a reasonable level. Reported by: wosch PR: 225197 Notes: svn path=/head/; revision=328218
* PowerNV: XICS support for PowerNV/OPALWojciech Macek2018-01-161-30/+180
| | | | | | | | | | | Make XICS to be OPAL-aware. Created by: Nathan Whitehorn <nwhitehorn@freebsd.org> Submitted by: Wojciech Macek <wma@semihalf.com> Sponsored by: FreeBSD Foundation Notes: svn path=/head/; revision=328042
* powerpc: make some use of mallocarray(9).Pedro F. Giffuni2018-01-151-2/+2
| | | | | | | | | | | | | | | | Focus on code where we are doing multiplications within malloc(9). None of these ire likely to overflow, however the change is still useful as some static checkers can benefit from the allocation attributes we use for mallocarray. This initial sweep only covers malloc(9) calls with M_NOWAIT. No good reason but I started doing the changes before r327796 and at that time it was convenient to make sure the sorrounding code could handle NULL values. X-Differential revision: https://reviews.freebsd.org/D13837 Notes: svn path=/head/; revision=328018
* Revert r327360, which can cause boot problems on high-CPU-count (>60)Nathan Whitehorn2018-01-041-132/+73
| | | | | | | | | POWER8 and POWER9 systems, pending further analysis. PR: 224841 Notes: svn path=/head/; revision=327566
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