diff options
| author | Premal Gajjar <premal.gajjar@einfochips.com> | 2025-02-24 13:46:13 +0000 |
|---|---|---|
| committer | Warner Losh <imp@FreeBSD.org> | 2025-04-28 16:02:50 +0000 |
| commit | 77be1f2fa6a18afc0d9111b2e4880fd4bacca02a (patch) | |
| tree | db205aba3db61eac43797f2a2b32a0985a8523fc | |
| parent | fa38579f317d5c2ff2926fab9b12ee6d429bd155 (diff) | |
| -rw-r--r-- | sys/dev/flash/flexspi/flex_spi.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/dev/flash/flexspi/flex_spi.c b/sys/dev/flash/flexspi/flex_spi.c index 9382b237ee71..44246f4b1c2d 100644 --- a/sys/dev/flash/flexspi/flex_spi.c +++ b/sys/dev/flash/flexspi/flex_spi.c @@ -329,20 +329,20 @@ flex_spi_write_txfifo(struct flex_spi_softc *sc, uint8_t *buf, uint8_t size) int i, ret, reg; /* invalid the TXFIFO */ - write_reg(sc, FSPI_IPRXFCR, FSPI_IPTXFCR_CLR); + write_reg(sc, FSPI_IPTXFCR, FSPI_IPTXFCR_CLR); /* * Default value of water mark level is 8 bytes, hence in single * read request controller can read max 8 bytes of data. */ for (i = 0; i < size; i += 4) { - /* Wait for RXFIFO available */ + /* Wait for TXFIFO available */ if (i % 8 == 0) { ret = reg_read_poll_tout(sc, FSPI_INTR, FSPI_INTR_IPTXWE, 1, 50000, 1); if (ret) device_printf(sc->dev, - "timed out waiting for FSPI_INTR_IPRXWA\n"); + "timed out waiting for FSPI_INTR_IPTXWE\n"); } if (size >= (i + 4)) |