diff options
| author | Olivier Houchard <cognet@FreeBSD.org> | 2005-01-10 22:41:08 +0000 |
|---|---|---|
| committer | Olivier Houchard <cognet@FreeBSD.org> | 2005-01-10 22:41:08 +0000 |
| commit | 8b64f2f5adb69a4dced8320803a80596bb938d65 (patch) | |
| tree | c31c883c76578c394c7bf70aafc1569684fedd7f | |
| parent | 1e183df21eab6628031db0d37dd8da8cafd75b16 (diff) | |
Notes
| -rw-r--r-- | sys/arm/arm/cpufunc_asm_xscale.S | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/sys/arm/arm/cpufunc_asm_xscale.S b/sys/arm/arm/cpufunc_asm_xscale.S index bc02d31ad7fe..b4700e4a4810 100644 --- a/sys/arm/arm/cpufunc_asm_xscale.S +++ b/sys/arm/arm/cpufunc_asm_xscale.S @@ -171,13 +171,11 @@ ENTRY(xscale_setttb) /* * TLB functions * - * Note: We don't need to worry about issuing a CPWAIT after - * TLB operations, because we expect a pmap_update() to follow. */ ENTRY(xscale_tlb_flushID_SE) mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */ mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */ - RET + CPWAIT_AND_RETURN(r0) /* * Cache functions |