diff options
| author | Nathan Whitehorn <nwhitehorn@FreeBSD.org> | 2013-11-17 05:03:15 +0000 |
|---|---|---|
| committer | Nathan Whitehorn <nwhitehorn@FreeBSD.org> | 2013-11-17 05:03:15 +0000 |
| commit | b8201e1c2c769838b3a8cc9fa7b6915754917e12 (patch) | |
| tree | 1e1805d2858f6290e5a8cd8ddd9bf0f9bca95801 | |
| parent | b8b46489f80b12dab880497d9d047cbb548ac58f (diff) | |
| download | src-b8201e1c2c769838b3a8cc9fa7b6915754917e12.tar.gz src-b8201e1c2c769838b3a8cc9fa7b6915754917e12.zip | |
Notes
| -rw-r--r-- | sys/powerpc/fpu/fpu_emu.c | 15 | ||||
| -rw-r--r-- | sys/powerpc/fpu/fpu_explode.c | 1 |
2 files changed, 13 insertions, 3 deletions
diff --git a/sys/powerpc/fpu/fpu_emu.c b/sys/powerpc/fpu/fpu_emu.c index 66cc2156f95e..49dc758b94e0 100644 --- a/sys/powerpc/fpu/fpu_emu.c +++ b/sys/powerpc/fpu/fpu_emu.c @@ -606,9 +606,11 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn) rb = instr.i_a.i_frb; rc = instr.i_a.i_frc; - type = FTYPE_SNG; - if (instr.i_any.i_opcd & 0x4) - type = FTYPE_DBL; + /* + * All arithmetic operations work on registers, which + * are stored as doubles. + */ + type = FTYPE_DBL; switch ((unsigned int)instr.i_a.i_xo) { case OPC59_FDIVS: FPU_EMU_EVCNT_INCR(fdiv); @@ -725,6 +727,13 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn) return (NOTFPU); break; } + + /* If the instruction was single precision, round */ + if (!(instr.i_any.i_opcd & 0x4)) { + fpu_implode(fe, fp, FTYPE_SNG, + (u_int *)&fs->fpreg[rt]); + fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG, rt); + } } } else { return (NOTFPU); diff --git a/sys/powerpc/fpu/fpu_explode.c b/sys/powerpc/fpu/fpu_explode.c index d2646fcdc8fc..91d92b30e41a 100644 --- a/sys/powerpc/fpu/fpu_explode.c +++ b/sys/powerpc/fpu/fpu_explode.c @@ -235,6 +235,7 @@ fpu_explode(struct fpemu *fe, struct fpn *fp, int type, int reg) s = fpu_dtof(fp, s, space[1]); break; + default: panic("fpu_explode"); panic("fpu_explode: invalid type %d", type); } |