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author | Dimitry Andric <dim@FreeBSD.org> | 2022-03-20 11:40:34 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2022-05-14 11:43:05 +0000 |
commit | 349cc55c9796c4596a5b9904cd3281af295f878f (patch) | |
tree | 410c5a785075730a35f1272ca6a7adf72222ad03 /contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h | |
parent | cb2ae6163174b90e999326ecec3699ee093a5d43 (diff) | |
parent | c0981da47d5696fe36474fcf86b4ce03ae3ff818 (diff) | |
download | src-349cc55c9796c4596a5b9904cd3281af295f878f.tar.gz src-349cc55c9796c4596a5b9904cd3281af295f878f.zip |
Merge llvm-project main llvmorg-14-init-10186-gff7f2cfa959b
This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-14-init-10186-gff7f2cfa959b.
PR: 261742
MFC after: 2 weeks
Diffstat (limited to 'contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h')
-rw-r--r-- | contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h | 38 |
1 files changed, 33 insertions, 5 deletions
diff --git a/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h b/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h index 8eab8a5846a7..ebe16cd4f58c 100644 --- a/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h +++ b/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h @@ -20,6 +20,7 @@ #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallVector.h" +#include "llvm/CodeGen/CodeGenCommonISel.h" #include "llvm/CodeGen/FunctionLoweringInfo.h" #include "llvm/CodeGen/GlobalISel/CSEMIRBuilder.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -466,9 +467,8 @@ private: bool translateSIToFP(const User &U, MachineIRBuilder &MIRBuilder) { return translateCast(TargetOpcode::G_SITOFP, U, MIRBuilder); } - bool translateUnreachable(const User &U, MachineIRBuilder &MIRBuilder) { - return true; - } + bool translateUnreachable(const User &U, MachineIRBuilder &MIRBuilder); + bool translateSExt(const User &U, MachineIRBuilder &MIRBuilder) { return translateCast(TargetOpcode::G_SEXT, U, MIRBuilder); } @@ -586,6 +586,8 @@ private: /// stop translating such blocks early. bool HasTailCall = false; + StackProtectorDescriptor SPDescriptor; + /// Switch analysis and optimization. class GISelSwitchLowering : public SwitchCG::SwitchLowering { public: @@ -614,8 +616,34 @@ private: // * Clear the different maps. void finalizeFunction(); - // Handle emitting jump tables for each basic block. - void finalizeBasicBlock(); + // Processing steps done per block. E.g. emitting jump tables, stack + // protectors etc. Returns true if no errors, false if there was a problem + // that caused an abort. + bool finalizeBasicBlock(const BasicBlock &BB, MachineBasicBlock &MBB); + + /// Codegen a new tail for a stack protector check ParentMBB which has had its + /// tail spliced into a stack protector check success bb. + /// + /// For a high level explanation of how this fits into the stack protector + /// generation see the comment on the declaration of class + /// StackProtectorDescriptor. + /// + /// \return true if there were no problems. + bool emitSPDescriptorParent(StackProtectorDescriptor &SPD, + MachineBasicBlock *ParentBB); + + /// Codegen the failure basic block for a stack protector check. + /// + /// A failure stack protector machine basic block consists simply of a call to + /// __stack_chk_fail(). + /// + /// For a high level explanation of how this fits into the stack protector + /// generation see the comment on the declaration of class + /// StackProtectorDescriptor. + /// + /// \return true if there were no problems. + bool emitSPDescriptorFailure(StackProtectorDescriptor &SPD, + MachineBasicBlock *FailureBB); /// Get the VRegs that represent \p Val. /// Non-aggregate types have just one corresponding VReg and the list can be |