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authorDimitry Andric <dim@FreeBSD.org>2023-04-14 21:41:27 +0000
committerDimitry Andric <dim@FreeBSD.org>2023-06-22 18:20:56 +0000
commitbdd1243df58e60e85101c09001d9812a789b6bc4 (patch)
treea1ce621c7301dd47ba2ddc3b8eaa63b441389481 /contrib/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp
parent781624ca2d054430052c828ba8d2c2eaf2d733e7 (diff)
parente3b557809604d036af6e00c60f012c2025b59a5e (diff)
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp')
-rw-r--r--contrib/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp35
1 files changed, 18 insertions, 17 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp b/contrib/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp
index f74ff30ab2e1..ce1ef571c9df 100644
--- a/contrib/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp
+++ b/contrib/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp
@@ -231,7 +231,7 @@ void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
// when i64 and f64 are both passed in GPRs.
StackOffset = SavedStackOffset;
MaxStackArgAlign = SavedMaxStackArgAlign;
- Locs.resize(NumLocs);
+ Locs.truncate(NumLocs);
}
void CCState::analyzeMustTailForwardedRegisters(
@@ -240,8 +240,8 @@ void CCState::analyzeMustTailForwardedRegisters(
// Oftentimes calling conventions will not user register parameters for
// variadic functions, so we need to assume we're not variadic so that we get
// all the registers that might be used in a non-variadic call.
- SaveAndRestore<bool> SavedVarArg(IsVarArg, false);
- SaveAndRestore<bool> SavedMustTail(AnalyzingMustTailForwardedRegs, true);
+ SaveAndRestore SavedVarArg(IsVarArg, false);
+ SaveAndRestore SavedMustTail(AnalyzingMustTailForwardedRegs, true);
for (MVT RegVT : RegParmTypes) {
SmallVector<MCPhysReg, 8> RemainingRegs;
@@ -270,19 +270,20 @@ bool CCState::resultsCompatible(CallingConv::ID CalleeCC,
CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
CCInfo2.AnalyzeCallResult(Ins, CallerFn);
- if (RVLocs1.size() != RVLocs2.size())
- return false;
- for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) {
- const CCValAssign &Loc1 = RVLocs1[I];
- const CCValAssign &Loc2 = RVLocs2[I];
-
- if ( // Must both be in registers, or both in memory
- Loc1.isRegLoc() != Loc2.isRegLoc() ||
- // Must fill the same part of their locations
- Loc1.getLocInfo() != Loc2.getLocInfo() ||
- // Memory offset/register number must be the same
- Loc1.getExtraInfo() != Loc2.getExtraInfo())
+ auto AreCompatible = [](const CCValAssign &Loc1, const CCValAssign &Loc2) {
+ assert(!Loc1.isPendingLoc() && !Loc2.isPendingLoc() &&
+ "The location must have been decided by now");
+ // Must fill the same part of their locations.
+ if (Loc1.getLocInfo() != Loc2.getLocInfo())
return false;
- }
- return true;
+ // Must both be in the same registers, or both in memory at the same offset.
+ if (Loc1.isRegLoc() && Loc2.isRegLoc())
+ return Loc1.getLocReg() == Loc2.getLocReg();
+ if (Loc1.isMemLoc() && Loc2.isMemLoc())
+ return Loc1.getLocMemOffset() == Loc2.getLocMemOffset();
+ llvm_unreachable("Unknown location kind");
+ };
+
+ return std::equal(RVLocs1.begin(), RVLocs1.end(), RVLocs2.begin(),
+ RVLocs2.end(), AreCompatible);
}