diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2021-06-13 19:31:46 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2021-06-13 19:37:19 +0000 |
commit | e8d8bef961a50d4dc22501cde4fb9fb0be1b2532 (patch) | |
tree | 94f04805f47bb7c59ae29690d8952b6074fff602 /contrib/llvm-project/llvm/lib/CodeGen/InterferenceCache.h | |
parent | bb130ff39747b94592cb26d71b7cb097b9a4ea6b (diff) | |
parent | b60736ec1405bb0a8dd40989f67ef4c93da068ab (diff) |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/InterferenceCache.h')
-rw-r--r-- | contrib/llvm-project/llvm/lib/CodeGen/InterferenceCache.h | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/InterferenceCache.h b/contrib/llvm-project/llvm/lib/CodeGen/InterferenceCache.h index 9019e9f61fa0..ace1691c1363 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/InterferenceCache.h +++ b/contrib/llvm-project/llvm/lib/CodeGen/InterferenceCache.h @@ -44,7 +44,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache { /// of PhysReg in all basic blocks. class Entry { /// PhysReg - The register currently represented. - unsigned PhysReg = 0; + MCRegister PhysReg = 0; /// Tag - Cache tag is changed when any of the underlying LiveIntervalUnions /// change. @@ -102,13 +102,13 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache { void clear(MachineFunction *mf, SlotIndexes *indexes, LiveIntervals *lis) { assert(!hasRefs() && "Cannot clear cache entry with references"); - PhysReg = 0; + PhysReg = MCRegister::NoRegister; MF = mf; Indexes = indexes; LIS = lis; } - unsigned getPhysReg() const { return PhysReg; } + MCRegister getPhysReg() const { return PhysReg; } void addRef(int Delta) { RefCount += Delta; } @@ -120,10 +120,8 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache { bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI); /// reset - Initialize entry to represent physReg's aliases. - void reset(unsigned physReg, - LiveIntervalUnion *LIUArray, - const TargetRegisterInfo *TRI, - const MachineFunction *MF); + void reset(MCRegister physReg, LiveIntervalUnion *LIUArray, + const TargetRegisterInfo *TRI, const MachineFunction *MF); /// get - Return an up to date BlockInterference. BlockInterference *get(unsigned MBBNum) { @@ -154,7 +152,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache { Entry Entries[CacheEntries]; // get - Get a valid entry for PhysReg. - Entry *get(unsigned PhysReg); + Entry *get(MCRegister PhysReg); public: InterferenceCache() = default; @@ -207,11 +205,11 @@ public: ~Cursor() { setEntry(nullptr); } /// setPhysReg - Point this cursor to PhysReg's interference. - void setPhysReg(InterferenceCache &Cache, unsigned PhysReg) { + void setPhysReg(InterferenceCache &Cache, MCRegister PhysReg) { // Release reference before getting a new one. That guarantees we can // actually have CacheEntries live cursors. setEntry(nullptr); - if (PhysReg) + if (PhysReg.isValid()) setEntry(Cache.get(PhysReg)); } |