diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2024-01-24 19:17:23 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2024-04-19 21:24:44 +0000 |
commit | ab50317e96e57dee5b3ff4ad3f16f205b2a3359e (patch) | |
tree | 4b1f388eb6a07e574417aaacecd3ec4a83550718 /contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp | |
parent | 412542983a5ba62902141a8a7e155cceb9196a66 (diff) |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp')
-rw-r--r-- | contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp | 37 |
1 files changed, 23 insertions, 14 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp b/contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp index 886137d86f87..f40e91819a48 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp @@ -1743,11 +1743,14 @@ class BaseMemOpClusterMutation : public ScheduleDAGMutation { const TargetInstrInfo *TII; const TargetRegisterInfo *TRI; bool IsLoad; + bool ReorderWhileClustering; public: BaseMemOpClusterMutation(const TargetInstrInfo *tii, - const TargetRegisterInfo *tri, bool IsLoad) - : TII(tii), TRI(tri), IsLoad(IsLoad) {} + const TargetRegisterInfo *tri, bool IsLoad, + bool ReorderWhileClustering) + : TII(tii), TRI(tri), IsLoad(IsLoad), + ReorderWhileClustering(ReorderWhileClustering) {} void apply(ScheduleDAGInstrs *DAGInstrs) override; @@ -1763,14 +1766,16 @@ protected: class StoreClusterMutation : public BaseMemOpClusterMutation { public: StoreClusterMutation(const TargetInstrInfo *tii, - const TargetRegisterInfo *tri) - : BaseMemOpClusterMutation(tii, tri, false) {} + const TargetRegisterInfo *tri, + bool ReorderWhileClustering) + : BaseMemOpClusterMutation(tii, tri, false, ReorderWhileClustering) {} }; class LoadClusterMutation : public BaseMemOpClusterMutation { public: - LoadClusterMutation(const TargetInstrInfo *tii, const TargetRegisterInfo *tri) - : BaseMemOpClusterMutation(tii, tri, true) {} + LoadClusterMutation(const TargetInstrInfo *tii, const TargetRegisterInfo *tri, + bool ReorderWhileClustering) + : BaseMemOpClusterMutation(tii, tri, true, ReorderWhileClustering) {} }; } // end anonymous namespace @@ -1779,15 +1784,19 @@ namespace llvm { std::unique_ptr<ScheduleDAGMutation> createLoadClusterDAGMutation(const TargetInstrInfo *TII, - const TargetRegisterInfo *TRI) { - return EnableMemOpCluster ? std::make_unique<LoadClusterMutation>(TII, TRI) + const TargetRegisterInfo *TRI, + bool ReorderWhileClustering) { + return EnableMemOpCluster ? std::make_unique<LoadClusterMutation>( + TII, TRI, ReorderWhileClustering) : nullptr; } std::unique_ptr<ScheduleDAGMutation> createStoreClusterDAGMutation(const TargetInstrInfo *TII, - const TargetRegisterInfo *TRI) { - return EnableMemOpCluster ? std::make_unique<StoreClusterMutation>(TII, TRI) + const TargetRegisterInfo *TRI, + bool ReorderWhileClustering) { + return EnableMemOpCluster ? std::make_unique<StoreClusterMutation>( + TII, TRI, ReorderWhileClustering) : nullptr; } @@ -1840,7 +1849,7 @@ void BaseMemOpClusterMutation::clusterNeighboringMemOps( SUnit *SUa = MemOpa.SU; SUnit *SUb = MemOpb.SU; - if (SUa->NodeNum > SUb->NodeNum) + if (!ReorderWhileClustering && SUa->NodeNum > SUb->NodeNum) std::swap(SUa, SUb); // FIXME: Is this check really required? @@ -4260,7 +4269,7 @@ static bool sortIntervals(const ResourceSegments::IntervalTy &A, } unsigned ResourceSegments::getFirstAvailableAt( - unsigned CurrCycle, unsigned AcquireAtCycle, unsigned Cycle, + unsigned CurrCycle, unsigned AcquireAtCycle, unsigned ReleaseAtCycle, std::function<ResourceSegments::IntervalTy(unsigned, unsigned, unsigned)> IntervalBuilder) const { assert(std::is_sorted(std::begin(_Intervals), std::end(_Intervals), @@ -4268,7 +4277,7 @@ unsigned ResourceSegments::getFirstAvailableAt( "Cannot execute on an un-sorted set of intervals."); unsigned RetCycle = CurrCycle; ResourceSegments::IntervalTy NewInterval = - IntervalBuilder(RetCycle, AcquireAtCycle, Cycle); + IntervalBuilder(RetCycle, AcquireAtCycle, ReleaseAtCycle); for (auto &Interval : _Intervals) { if (!intersects(NewInterval, Interval)) continue; @@ -4278,7 +4287,7 @@ unsigned ResourceSegments::getFirstAvailableAt( assert(Interval.second > NewInterval.first && "Invalid intervals configuration."); RetCycle += (unsigned)Interval.second - (unsigned)NewInterval.first; - NewInterval = IntervalBuilder(RetCycle, AcquireAtCycle, Cycle); + NewInterval = IntervalBuilder(RetCycle, AcquireAtCycle, ReleaseAtCycle); } return RetCycle; } |