diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2022-03-20 11:40:34 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2022-05-14 11:43:05 +0000 |
commit | 349cc55c9796c4596a5b9904cd3281af295f878f (patch) | |
tree | 410c5a785075730a35f1272ca6a7adf72222ad03 /contrib/llvm-project/llvm/lib/CodeGen/ModuloSchedule.cpp | |
parent | cb2ae6163174b90e999326ecec3699ee093a5d43 (diff) | |
parent | c0981da47d5696fe36474fcf86b4ce03ae3ff818 (diff) |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/ModuloSchedule.cpp')
-rw-r--r-- | contrib/llvm-project/llvm/lib/CodeGen/ModuloSchedule.cpp | 101 |
1 files changed, 38 insertions, 63 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/ModuloSchedule.cpp b/contrib/llvm-project/llvm/lib/CodeGen/ModuloSchedule.cpp index b5517c40a28a..8b3cdfab4d42 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/ModuloSchedule.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/ModuloSchedule.cpp @@ -81,10 +81,7 @@ void ModuloScheduleExpander::expand() { Register Reg = Op.getReg(); unsigned MaxDiff = 0; bool PhiIsSwapped = false; - for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(Reg), - EI = MRI.use_end(); - UI != EI; ++UI) { - MachineOperand &UseOp = *UI; + for (MachineOperand &UseOp : MRI.use_operands(Reg)) { MachineInstr *UseMI = UseOp.getParent(); int UseStage = Schedule.getStage(UseMI); unsigned Diff = 0; @@ -141,13 +138,11 @@ void ModuloScheduleExpander::generatePipelinedLoop() { // Copy any terminator instructions to the new kernel, and update // names as needed. - for (MachineBasicBlock::iterator I = BB->getFirstTerminator(), - E = BB->instr_end(); - I != E; ++I) { - MachineInstr *NewMI = MF.CloneMachineInstr(&*I); + for (MachineInstr &MI : BB->terminators()) { + MachineInstr *NewMI = MF.CloneMachineInstr(&MI); updateInstruction(NewMI, false, MaxStageCount, 0, VRMap); KernelBB->push_back(NewMI); - InstrMap[NewMI] = &*I; + InstrMap[NewMI] = &MI; } NewKernel = KernelBB; @@ -334,14 +329,10 @@ static void replaceRegUsesAfterLoop(unsigned FromReg, unsigned ToReg, MachineBasicBlock *MBB, MachineRegisterInfo &MRI, LiveIntervals &LIS) { - for (MachineRegisterInfo::use_iterator I = MRI.use_begin(FromReg), - E = MRI.use_end(); - I != E;) { - MachineOperand &O = *I; - ++I; + for (MachineOperand &O : + llvm::make_early_inc_range(MRI.use_operands(FromReg))) if (O.getParent()->getParent() != MBB) O.setReg(ToReg); - } if (!LIS.hasInterval(ToReg)) LIS.createEmptyInterval(ToReg); } @@ -350,10 +341,8 @@ static void replaceRegUsesAfterLoop(unsigned FromReg, unsigned ToReg, /// specified loop. static bool hasUseAfterLoop(unsigned Reg, MachineBasicBlock *BB, MachineRegisterInfo &MRI) { - for (MachineRegisterInfo::use_iterator I = MRI.use_begin(Reg), - E = MRI.use_end(); - I != E; ++I) - if (I->getParent()->getParent() != BB) + for (const MachineOperand &MO : MRI.use_operands(Reg)) + if (MO.getParent()->getParent() != BB) return true; return false; } @@ -702,11 +691,9 @@ void ModuloScheduleExpander::removeDeadInstructions(MachineBasicBlock *KernelBB, MBBVectorTy &EpilogBBs) { // For each epilog block, check that the value defined by each instruction // is used. If not, delete it. - for (MBBVectorTy::reverse_iterator MBB = EpilogBBs.rbegin(), - MBE = EpilogBBs.rend(); - MBB != MBE; ++MBB) - for (MachineBasicBlock::reverse_instr_iterator MI = (*MBB)->instr_rbegin(), - ME = (*MBB)->instr_rend(); + for (MachineBasicBlock *MBB : llvm::reverse(EpilogBBs)) + for (MachineBasicBlock::reverse_instr_iterator MI = MBB->instr_rbegin(), + ME = MBB->instr_rend(); MI != ME;) { // From DeadMachineInstructionElem. Don't delete inline assembly. if (MI->isInlineAsm()) { @@ -721,26 +708,22 @@ void ModuloScheduleExpander::removeDeadInstructions(MachineBasicBlock *KernelBB, continue; } bool used = true; - for (MachineInstr::mop_iterator MOI = MI->operands_begin(), - MOE = MI->operands_end(); - MOI != MOE; ++MOI) { - if (!MOI->isReg() || !MOI->isDef()) + for (const MachineOperand &MO : MI->operands()) { + if (!MO.isReg() || !MO.isDef()) continue; - Register reg = MOI->getReg(); + Register reg = MO.getReg(); // Assume physical registers are used, unless they are marked dead. if (Register::isPhysicalRegister(reg)) { - used = !MOI->isDead(); + used = !MO.isDead(); if (used) break; continue; } unsigned realUses = 0; - for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(reg), - EI = MRI.use_end(); - UI != EI; ++UI) { + for (const MachineOperand &U : MRI.use_operands(reg)) { // Check if there are any uses that occur only in the original // loop. If so, that's not a real use. - if (UI->getParent()->getParent() != BB) { + if (U.getParent()->getParent() != BB) { realUses++; used = true; break; @@ -759,15 +742,11 @@ void ModuloScheduleExpander::removeDeadInstructions(MachineBasicBlock *KernelBB, } // In the kernel block, check if we can remove a Phi that generates a value // used in an instruction removed in the epilog block. - for (MachineBasicBlock::iterator BBI = KernelBB->instr_begin(), - BBE = KernelBB->getFirstNonPHI(); - BBI != BBE;) { - MachineInstr *MI = &*BBI; - ++BBI; - Register reg = MI->getOperand(0).getReg(); + for (MachineInstr &MI : llvm::make_early_inc_range(KernelBB->phis())) { + Register reg = MI.getOperand(0).getReg(); if (MRI.use_begin(reg) == MRI.use_end()) { - LIS.RemoveMachineInstrFromMaps(*MI); - MI->eraseFromParent(); + LIS.RemoveMachineInstrFromMaps(MI); + MI.eraseFromParent(); } } } @@ -1145,12 +1124,9 @@ void ModuloScheduleExpander::rewriteScheduledInstr( int StagePhi = Schedule.getStage(Phi) + PhiNum; // Rewrite uses that have been scheduled already to use the new // Phi register. - for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(OldReg), - EI = MRI.use_end(); - UI != EI;) { - MachineOperand &UseOp = *UI; + for (MachineOperand &UseOp : + llvm::make_early_inc_range(MRI.use_operands(OldReg))) { MachineInstr *UseMI = UseOp.getParent(); - ++UI; if (UseMI->getParent() != BB) continue; if (UseMI->isPHI()) { @@ -1223,8 +1199,7 @@ void EliminateDeadPhis(MachineBasicBlock *MBB, MachineRegisterInfo &MRI, bool Changed = true; while (Changed) { Changed = false; - for (auto I = MBB->begin(); I != MBB->getFirstNonPHI();) { - MachineInstr &MI = *I++; + for (MachineInstr &MI : llvm::make_early_inc_range(MBB->phis())) { assert(MI.isPHI()); if (MRI.use_empty(MI.getOperand(0).getReg())) { if (LIS) @@ -1624,32 +1599,32 @@ void PeelingModuloScheduleExpander::moveStageBetweenBlocks( MachineBasicBlock *DestBB, MachineBasicBlock *SourceBB, unsigned Stage) { auto InsertPt = DestBB->getFirstNonPHI(); DenseMap<Register, Register> Remaps; - for (auto I = SourceBB->getFirstNonPHI(); I != SourceBB->end();) { - MachineInstr *MI = &*I++; - if (MI->isPHI()) { + for (MachineInstr &MI : llvm::make_early_inc_range( + llvm::make_range(SourceBB->getFirstNonPHI(), SourceBB->end()))) { + if (MI.isPHI()) { // This is an illegal PHI. If we move any instructions using an illegal // PHI, we need to create a legal Phi. - if (getStage(MI) != Stage) { + if (getStage(&MI) != Stage) { // The legal Phi is not necessary if the illegal phi's stage // is being moved. - Register PhiR = MI->getOperand(0).getReg(); + Register PhiR = MI.getOperand(0).getReg(); auto RC = MRI.getRegClass(PhiR); Register NR = MRI.createVirtualRegister(RC); MachineInstr *NI = BuildMI(*DestBB, DestBB->getFirstNonPHI(), DebugLoc(), TII->get(TargetOpcode::PHI), NR) .addReg(PhiR) .addMBB(SourceBB); - BlockMIs[{DestBB, CanonicalMIs[MI]}] = NI; - CanonicalMIs[NI] = CanonicalMIs[MI]; + BlockMIs[{DestBB, CanonicalMIs[&MI]}] = NI; + CanonicalMIs[NI] = CanonicalMIs[&MI]; Remaps[PhiR] = NR; } } - if (getStage(MI) != Stage) + if (getStage(&MI) != Stage) continue; - MI->removeFromParent(); - DestBB->insert(InsertPt, MI); - auto *KernelMI = CanonicalMIs[MI]; - BlockMIs[{DestBB, KernelMI}] = MI; + MI.removeFromParent(); + DestBB->insert(InsertPt, &MI); + auto *KernelMI = CanonicalMIs[&MI]; + BlockMIs[{DestBB, KernelMI}] = &MI; BlockMIs.erase({SourceBB, KernelMI}); } SmallVector<MachineInstr *, 4> PhiToDelete; @@ -1768,8 +1743,8 @@ void PeelingModuloScheduleExpander::peelPrologAndEpilogs() { // Keep track at which iteration each phi belongs to. We need it to know // what version of the variable to use during prologue/epilogue stitching. EliminateDeadPhis(B, MRI, LIS, /*KeepSingleSrcPhi=*/true); - for (auto Phi = B->begin(), IE = B->getFirstNonPHI(); Phi != IE; ++Phi) - PhiNodeLoopIteration[&*Phi] = Schedule.getNumStages() - I; + for (MachineInstr &Phi : B->phis()) + PhiNodeLoopIteration[&Phi] = Schedule.getNumStages() - I; } for (size_t I = 0; I < Epilogs.size(); I++) { LS.reset(); |