diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2022-07-04 19:20:19 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2023-02-08 19:02:26 +0000 |
| commit | 81ad626541db97eb356e2c1d4a20eb2a26a766ab (patch) | |
| tree | 311b6a8987c32b1e1dcbab65c54cfac3fdb56175 /contrib/llvm-project/llvm/lib/CodeGen/ReachingDefAnalysis.cpp | |
| parent | 5fff09660e06a66bed6482da9c70df328e16bbb6 (diff) | |
| parent | 145449b1e420787bb99721a429341fa6be3adfb6 (diff) | |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/ReachingDefAnalysis.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/ReachingDefAnalysis.cpp b/contrib/llvm-project/llvm/lib/CodeGen/ReachingDefAnalysis.cpp index 1264e6021b6e..69db8bad54f9 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/ReachingDefAnalysis.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/ReachingDefAnalysis.cpp @@ -34,12 +34,7 @@ static bool isValidRegUseOf(const MachineOperand &MO, MCRegister PhysReg, const TargetRegisterInfo *TRI) { if (!isValidRegUse(MO)) return false; - if (MO.getReg() == PhysReg) - return true; - for (MCRegAliasIterator R(PhysReg, TRI, false); R.isValid(); ++R) - if (MO.getReg() == *R) - return true; - return false; + return TRI->regsOverlap(MO.getReg(), PhysReg); } static bool isValidRegDef(const MachineOperand &MO) { @@ -50,12 +45,7 @@ static bool isValidRegDefOf(const MachineOperand &MO, MCRegister PhysReg, const TargetRegisterInfo *TRI) { if (!isValidRegDef(MO)) return false; - if (MO.getReg() == PhysReg) - return true; - for (MCRegAliasIterator R(PhysReg, TRI, false); R.isValid(); ++R) - if (MO.getReg() == *R) - return true; - return false; + return TRI->regsOverlap(MO.getReg(), PhysReg); } void ReachingDefAnalysis::enterBasicBlock(MachineBasicBlock *MBB) { |