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authorDimitry Andric <dim@FreeBSD.org>2021-12-02 21:49:08 +0000
committerDimitry Andric <dim@FreeBSD.org>2022-06-04 11:59:04 +0000
commit574b7079b96703a748f89ef5adb7dc3e26b8f7fc (patch)
tree195000196b1e0cc13dea43258fa240e006f48184 /contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp
parent1f6fd64fe9c996b4795ee4a6c66b8f9216747560 (diff)
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp')
-rw-r--r--contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp9
1 files changed, 3 insertions, 6 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp b/contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp
index 68920e2e50df..6653145d3d2a 100644
--- a/contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/contrib/llvm-project/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -1258,8 +1258,7 @@ void RegAllocFast::allocateInstruction(MachineInstr &MI) {
// Free registers occupied by defs.
// Iterate operands in reverse order, so we see the implicit super register
// defs first (we added them earlier in case of <def,read-undef>).
- for (unsigned I = MI.getNumOperands(); I-- > 0;) {
- MachineOperand &MO = MI.getOperand(I);
+ for (MachineOperand &MO : llvm::reverse(MI.operands())) {
if (!MO.isReg() || !MO.isDef())
continue;
@@ -1362,8 +1361,7 @@ void RegAllocFast::allocateInstruction(MachineInstr &MI) {
// Free early clobbers.
if (HasEarlyClobber) {
- for (unsigned I = MI.getNumOperands(); I-- > 0; ) {
- MachineOperand &MO = MI.getOperand(I);
+ for (MachineOperand &MO : llvm::reverse(MI.operands())) {
if (!MO.isReg() || !MO.isDef() || !MO.isEarlyClobber())
continue;
// subreg defs don't free the full register. We left the subreg number
@@ -1440,8 +1438,7 @@ void RegAllocFast::handleBundle(MachineInstr &MI) {
MachineBasicBlock::instr_iterator BundledMI = MI.getIterator();
++BundledMI;
while (BundledMI->isBundledWithPred()) {
- for (unsigned I = 0; I < BundledMI->getNumOperands(); ++I) {
- MachineOperand &MO = BundledMI->getOperand(I);
+ for (MachineOperand &MO : BundledMI->operands()) {
if (!MO.isReg())
continue;