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author | Dimitry Andric <dim@FreeBSD.org> | 2022-04-28 18:32:24 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2022-05-14 11:46:42 +0000 |
commit | 3a9a9c0ca44ec535dcf73fe8462bee458e54814b (patch) | |
tree | 13eff4cf89a999893d2f6ead8c5b4684236df8ed /contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
parent | 53683b95ef66a12337999587cd98302b1b425920 (diff) | |
parent | 139d5007613696147437159a7f0d0cdcac702529 (diff) |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
-rw-r--r-- | contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 01230a36e744..c61716ba1676 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -926,7 +926,10 @@ void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG, CallConv.getValue(), RegVTs[Value]) : RegVTs[Value]; - if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT)) + // We need to zero extend constants that are liveout to match assumptions + // in FunctionLoweringInfo::ComputePHILiveOutRegInfo. + if (ExtendKind == ISD::ANY_EXTEND && + (TLI.isZExtFree(Val, RegisterVT) || isa<ConstantSDNode>(Val))) ExtendKind = ISD::ZERO_EXTEND; getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value), &Parts[Part], |