diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2024-01-24 19:17:23 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2024-04-06 20:13:49 +0000 |
commit | 7a6dacaca14b62ca4b74406814becb87a3fefac0 (patch) | |
tree | 273a870ac27484bb1f5ee55e7ef0dc0d061f63e7 /contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
parent | 46c59ea9b61755455ff6bf9f3e7b834e1af634ea (diff) | |
parent | 4df029cc74e5ec124f14a5682e44999ce4f086df (diff) |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
-rw-r--r-- | contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 87 |
1 files changed, 54 insertions, 33 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 2c477b947430..5ce1013f30fd 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -153,6 +153,7 @@ static const unsigned MaxParallelChains = 64; static SDValue getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, + SDValue InChain, std::optional<CallingConv::ID> CC); /// getCopyFromParts - Create a value that contains the specified legal parts @@ -163,6 +164,7 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL, static SDValue getCopyFromParts(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, + SDValue InChain, std::optional<CallingConv::ID> CC = std::nullopt, std::optional<ISD::NodeType> AssertOp = std::nullopt) { // Let the target assemble the parts if it wants to @@ -173,7 +175,7 @@ getCopyFromParts(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, if (ValueVT.isVector()) return getCopyFromPartsVector(DAG, DL, Parts, NumParts, PartVT, ValueVT, V, - CC); + InChain, CC); assert(NumParts > 0 && "No parts to assemble!"); SDValue Val = Parts[0]; @@ -194,10 +196,10 @@ getCopyFromParts(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2); if (RoundParts > 2) { - Lo = getCopyFromParts(DAG, DL, Parts, RoundParts / 2, - PartVT, HalfVT, V); - Hi = getCopyFromParts(DAG, DL, Parts + RoundParts / 2, - RoundParts / 2, PartVT, HalfVT, V); + Lo = getCopyFromParts(DAG, DL, Parts, RoundParts / 2, PartVT, HalfVT, V, + InChain); + Hi = getCopyFromParts(DAG, DL, Parts + RoundParts / 2, RoundParts / 2, + PartVT, HalfVT, V, InChain); } else { Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); @@ -213,7 +215,7 @@ getCopyFromParts(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned OddParts = NumParts - RoundParts; EVT OddVT = EVT::getIntegerVT(*DAG.getContext(), OddParts * PartBits); Hi = getCopyFromParts(DAG, DL, Parts + RoundParts, OddParts, PartVT, - OddVT, V, CC); + OddVT, V, InChain, CC); // Combine the round and odd parts. Lo = Val; @@ -243,7 +245,8 @@ getCopyFromParts(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, assert(ValueVT.isFloatingPoint() && PartVT.isInteger() && !PartVT.isVector() && "Unexpected split"); EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), ValueVT.getSizeInBits()); - Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT, V, CC); + Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT, V, + InChain, CC); } } @@ -283,10 +286,20 @@ getCopyFromParts(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, if (PartEVT.isFloatingPoint() && ValueVT.isFloatingPoint()) { // FP_ROUND's are always exact here. - if (ValueVT.bitsLT(Val.getValueType())) - return DAG.getNode( - ISD::FP_ROUND, DL, ValueVT, Val, - DAG.getTargetConstant(1, DL, TLI.getPointerTy(DAG.getDataLayout()))); + if (ValueVT.bitsLT(Val.getValueType())) { + + SDValue NoChange = + DAG.getTargetConstant(1, DL, TLI.getPointerTy(DAG.getDataLayout())); + + if (DAG.getMachineFunction().getFunction().getAttributes().hasFnAttr( + llvm::Attribute::StrictFP)) { + return DAG.getNode(ISD::STRICT_FP_ROUND, DL, + DAG.getVTList(ValueVT, MVT::Other), InChain, Val, + NoChange); + } + + return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val, NoChange); + } return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val); } @@ -324,6 +337,7 @@ static void diagnosePossiblyInvalidConstraint(LLVMContext &Ctx, const Value *V, static SDValue getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, + SDValue InChain, std::optional<CallingConv::ID> CallConv) { assert(ValueVT.isVector() && "Not a vector value"); assert(NumParts > 0 && "No parts to assemble!"); @@ -362,8 +376,8 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL, // If the register was not expanded, truncate or copy the value, // as appropriate. for (unsigned i = 0; i != NumParts; ++i) - Ops[i] = getCopyFromParts(DAG, DL, &Parts[i], 1, - PartVT, IntermediateVT, V, CallConv); + Ops[i] = getCopyFromParts(DAG, DL, &Parts[i], 1, PartVT, IntermediateVT, + V, InChain, CallConv); } else if (NumParts > 0) { // If the intermediate type was expanded, build the intermediate // operands from the parts. @@ -371,8 +385,8 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL, "Must expand into a divisible number of parts!"); unsigned Factor = NumParts / NumIntermediates; for (unsigned i = 0; i != NumIntermediates; ++i) - Ops[i] = getCopyFromParts(DAG, DL, &Parts[i * Factor], Factor, - PartVT, IntermediateVT, V, CallConv); + Ops[i] = getCopyFromParts(DAG, DL, &Parts[i * Factor], Factor, PartVT, + IntermediateVT, V, InChain, CallConv); } // Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the @@ -926,7 +940,7 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG, } Values[Value] = getCopyFromParts(DAG, dl, Parts.begin(), NumRegs, - RegisterVT, ValueVT, V, CallConv); + RegisterVT, ValueVT, V, Chain, CallConv); Part += NumRegs; Parts.clear(); } @@ -1227,6 +1241,11 @@ void SelectionDAGBuilder::visitDbgInfo(const Instruction &I) { It->Expr, Vals.size() > 1, It->DL, SDNodeOrder); } } + // We must early-exit here to prevent any DPValues from being emitted below, + // as we have just emitted the debug values resulting from assignment + // tracking analysis, making any existing DPValues redundant (and probably + // less correct). + return; } // Is there is any debug-info attached to this instruction, in the form of @@ -1535,6 +1554,11 @@ bool SelectionDAGBuilder::handleDebugValue(ArrayRef<const Value *> Values, unsigned Order, bool IsVariadic) { if (Values.empty()) return true; + + // Filter EntryValue locations out early. + if (visitEntryValueDbgValue(Values, Var, Expr, DbgLoc)) + return true; + SmallVector<SDDbgOperand> LocationOps; SmallVector<SDNode *> Dependencies; for (const Value *V : Values) { @@ -6009,14 +6033,14 @@ static const CallBase *FindPreallocatedCall(const Value *PreallocatedSetup) { /// If DI is a debug value with an EntryValue expression, lower it using the /// corresponding physical register of the associated Argument value /// (guaranteed to exist by the verifier). -bool SelectionDAGBuilder::visitEntryValueDbgValue(const DbgValueInst &DI) { - DILocalVariable *Variable = DI.getVariable(); - DIExpression *Expr = DI.getExpression(); - if (!Expr->isEntryValue() || !hasSingleElement(DI.getValues())) +bool SelectionDAGBuilder::visitEntryValueDbgValue( + ArrayRef<const Value *> Values, DILocalVariable *Variable, + DIExpression *Expr, DebugLoc DbgLoc) { + if (!Expr->isEntryValue() || !hasSingleElement(Values)) return false; // These properties are guaranteed by the verifier. - Argument *Arg = cast<Argument>(DI.getValue(0)); + const Argument *Arg = cast<Argument>(Values[0]); assert(Arg->hasAttribute(Attribute::AttrKind::SwiftAsync)); auto ArgIt = FuncInfo.ValueMap.find(Arg); @@ -6030,9 +6054,8 @@ bool SelectionDAGBuilder::visitEntryValueDbgValue(const DbgValueInst &DI) { for (auto [PhysReg, VirtReg] : FuncInfo.RegInfo->liveins()) if (ArgVReg == VirtReg || ArgVReg == PhysReg) { - SDDbgValue *SDV = - DAG.getVRegDbgValue(Variable, Expr, PhysReg, false /*IsIndidrect*/, - DI.getDebugLoc(), SDNodeOrder); + SDDbgValue *SDV = DAG.getVRegDbgValue( + Variable, Expr, PhysReg, false /*IsIndidrect*/, DbgLoc, SDNodeOrder); DAG.AddDbgValue(SDV, false /*treat as dbg.declare byval parameter*/); return true; } @@ -6324,9 +6347,6 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, DIExpression *Expression = DI.getExpression(); dropDanglingDebugInfo(Variable, Expression); - if (visitEntryValueDbgValue(DI)) - return; - if (DI.isKillLocation()) { handleKillDebugValue(Variable, Expression, DI.getDebugLoc(), SDNodeOrder); return; @@ -10628,9 +10648,9 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const { unsigned NumRegs = getNumRegistersForCallingConv(CLI.RetTy->getContext(), CLI.CallConv, VT); - ReturnValues.push_back(getCopyFromParts(CLI.DAG, CLI.DL, &InVals[CurReg], - NumRegs, RegisterVT, VT, nullptr, - CLI.CallConv, AssertOp)); + ReturnValues.push_back(getCopyFromParts( + CLI.DAG, CLI.DL, &InVals[CurReg], NumRegs, RegisterVT, VT, nullptr, + CLI.Chain, CLI.CallConv, AssertOp)); CurReg += NumRegs; } @@ -11109,8 +11129,9 @@ void SelectionDAGISel::LowerArguments(const Function &F) { MVT VT = ValueVTs[0].getSimpleVT(); MVT RegVT = TLI->getRegisterType(*CurDAG->getContext(), VT); std::optional<ISD::NodeType> AssertOp; - SDValue ArgValue = getCopyFromParts(DAG, dl, &InVals[0], 1, RegVT, VT, - nullptr, F.getCallingConv(), AssertOp); + SDValue ArgValue = + getCopyFromParts(DAG, dl, &InVals[0], 1, RegVT, VT, nullptr, NewRoot, + F.getCallingConv(), AssertOp); MachineFunction& MF = SDB->DAG.getMachineFunction(); MachineRegisterInfo& RegInfo = MF.getRegInfo(); @@ -11182,7 +11203,7 @@ void SelectionDAGISel::LowerArguments(const Function &F) { AssertOp = ISD::AssertZext; ArgValues.push_back(getCopyFromParts(DAG, dl, &InVals[i], NumParts, - PartVT, VT, nullptr, + PartVT, VT, nullptr, NewRoot, F.getCallingConv(), AssertOp)); } |