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authorDimitry Andric <dim@FreeBSD.org>2023-12-18 20:30:12 +0000
committerDimitry Andric <dim@FreeBSD.org>2024-04-19 21:12:03 +0000
commitc9157d925c489f07ba9c0b2ce47e5149b75969a5 (patch)
tree08bc4a3d9cad3f9ebffa558ddf140b9d9257b219 /contrib/llvm-project/llvm/lib/CodeGen/TargetPassConfig.cpp
parent2a66844f606a35d68ad8a8061f4bea204274b3bc (diff)
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/TargetPassConfig.cpp')
-rw-r--r--contrib/llvm-project/llvm/lib/CodeGen/TargetPassConfig.cpp71
1 files changed, 44 insertions, 27 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/TargetPassConfig.cpp b/contrib/llvm-project/llvm/lib/CodeGen/TargetPassConfig.cpp
index 98ea2f21b3c8..faa5466b69e8 100644
--- a/contrib/llvm-project/llvm/lib/CodeGen/TargetPassConfig.cpp
+++ b/contrib/llvm-project/llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -113,10 +113,9 @@ static cl::opt<bool> DisableMergeICmps("disable-mergeicmps",
cl::init(false), cl::Hidden);
static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
cl::desc("Print LLVM IR produced by the loop-reduce pass"));
-static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
- cl::desc("Print LLVM IR input to isel pass"));
-static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
- cl::desc("Dump garbage collector data"));
+static cl::opt<bool>
+ PrintISelInput("print-isel-input", cl::Hidden,
+ cl::desc("Print LLVM IR input to isel pass"));
static cl::opt<cl::boolOrDefault>
VerifyMachineCode("verify-machineinstrs", cl::Hidden,
cl::desc("Verify generated machine code"));
@@ -250,6 +249,11 @@ static cl::opt<bool> DisableSelectOptimize(
"disable-select-optimize", cl::init(true), cl::Hidden,
cl::desc("Disable the select-optimization pass from running"));
+/// Enable garbage-collecting empty basic blocks.
+static cl::opt<bool>
+ GCEmptyBlocks("gc-empty-basic-blocks", cl::init(false), cl::Hidden,
+ cl::desc("Enable garbage-collecting empty basic blocks"));
+
/// Allow standard passes to be disabled by command line options. This supports
/// simple binary flags that either suppress the pass or do nothing.
/// i.e. -disable-mypass=false has no effect.
@@ -470,6 +474,11 @@ CGPassBuilderOption llvm::getCGPassBuilderOption() {
SET_OPTION(EnableIPRA)
SET_OPTION(OptimizeRegAlloc)
SET_OPTION(VerifyMachineCode)
+ SET_OPTION(DisableAtExitBasedGlobalDtorLowering)
+ SET_OPTION(DisableExpandReductions)
+ SET_OPTION(PrintAfterISel)
+ SET_OPTION(FSProfileFile)
+ SET_OPTION(GCEmptyBlocks)
#define SET_BOOLEAN_OPTION(Option) Opt.Option = Option;
@@ -486,7 +495,11 @@ CGPassBuilderOption llvm::getCGPassBuilderOption() {
SET_BOOLEAN_OPTION(DisableSelectOptimize)
SET_BOOLEAN_OPTION(PrintLSR)
SET_BOOLEAN_OPTION(PrintISelInput)
- SET_BOOLEAN_OPTION(PrintGCInfo)
+ SET_BOOLEAN_OPTION(DebugifyAndStripAll)
+ SET_BOOLEAN_OPTION(DebugifyCheckAndStripAll)
+ SET_BOOLEAN_OPTION(DisableRAFSProfileLoader)
+ SET_BOOLEAN_OPTION(DisableCFIFixup)
+ SET_BOOLEAN_OPTION(EnableMachineFunctionSplitter)
return Opt;
}
@@ -626,7 +639,7 @@ TargetPassConfig::TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm)
setStartStopPasses();
}
-CodeGenOpt::Level TargetPassConfig::getOptLevel() const {
+CodeGenOptLevel TargetPassConfig::getOptLevel() const {
return TM->getOptLevel();
}
@@ -841,7 +854,7 @@ void TargetPassConfig::addIRPasses() {
if (!DisableVerify)
addPass(createVerifierPass());
- if (getOptLevel() != CodeGenOpt::None) {
+ if (getOptLevel() != CodeGenOptLevel::None) {
// Basic AliasAnalysis support.
// Add TypeBasedAliasAnalysis before BasicAliasAnalysis so that
// BasicAliasAnalysis wins if they disagree. This is intended to help
@@ -865,7 +878,7 @@ void TargetPassConfig::addIRPasses() {
// target lowering hook.
if (!DisableMergeICmps)
addPass(createMergeICmpsLegacyPass());
- addPass(createExpandMemCmpPass());
+ addPass(createExpandMemCmpLegacyPass());
}
// Run GC lowering passes for builtin collectors
@@ -884,13 +897,13 @@ void TargetPassConfig::addIRPasses() {
addPass(createUnreachableBlockEliminationPass());
// Prepare expensive constants for SelectionDAG.
- if (getOptLevel() != CodeGenOpt::None && !DisableConstantHoisting)
+ if (getOptLevel() != CodeGenOptLevel::None && !DisableConstantHoisting)
addPass(createConstantHoistingPass());
- if (getOptLevel() != CodeGenOpt::None)
+ if (getOptLevel() != CodeGenOptLevel::None)
addPass(createReplaceWithVeclibLegacyPass());
- if (getOptLevel() != CodeGenOpt::None && !DisablePartialLibcallInlining)
+ if (getOptLevel() != CodeGenOptLevel::None && !DisablePartialLibcallInlining)
addPass(createPartiallyInlineLibCallsPass());
// Expand vector predication intrinsics into standard IR instructions.
@@ -908,11 +921,11 @@ void TargetPassConfig::addIRPasses() {
if (!DisableExpandReductions)
addPass(createExpandReductionsPass());
- if (getOptLevel() != CodeGenOpt::None)
+ if (getOptLevel() != CodeGenOptLevel::None)
addPass(createTLSVariableHoistPass());
// Convert conditional moves to conditional jumps when profitable.
- if (getOptLevel() != CodeGenOpt::None && !DisableSelectOptimize)
+ if (getOptLevel() != CodeGenOptLevel::None && !DisableSelectOptimize)
addPass(createSelectOptimizePass());
}
@@ -963,7 +976,7 @@ void TargetPassConfig::addPassesToHandleExceptions() {
/// Add pass to prepare the LLVM IR for code generation. This should be done
/// before exception handling preparation passes.
void TargetPassConfig::addCodeGenPrepare() {
- if (getOptLevel() != CodeGenOpt::None && !DisableCGP)
+ if (getOptLevel() != CodeGenOptLevel::None && !DisableCGP)
addPass(createCodeGenPreparePass());
}
@@ -1007,7 +1020,8 @@ bool TargetPassConfig::addCoreISelPasses() {
(TM->Options.EnableGlobalISel &&
EnableGlobalISelOption != cl::BOU_FALSE))
Selector = SelectorType::GlobalISel;
- else if (TM->getOptLevel() == CodeGenOpt::None && TM->getO0WantsFastISel())
+ else if (TM->getOptLevel() == CodeGenOptLevel::None &&
+ TM->getO0WantsFastISel())
Selector = SelectorType::FastISel;
else
Selector = SelectorType::SelectionDAG;
@@ -1124,7 +1138,7 @@ void TargetPassConfig::addMachinePasses() {
AddingMachinePasses = true;
// Add passes that optimize machine instructions in SSA form.
- if (getOptLevel() != CodeGenOpt::None) {
+ if (getOptLevel() != CodeGenOptLevel::None) {
addMachineSSAOptimization();
} else {
// If the target requests it, assign local variables to stack slots relative
@@ -1170,7 +1184,7 @@ void TargetPassConfig::addMachinePasses() {
addPass(&FixupStatepointCallerSavedID);
// Insert prolog/epilog code. Eliminate abstract frame index references...
- if (getOptLevel() != CodeGenOpt::None) {
+ if (getOptLevel() != CodeGenOptLevel::None) {
addPass(&PostRAMachineSinkingID);
addPass(&ShrinkWrapID);
}
@@ -1181,8 +1195,8 @@ void TargetPassConfig::addMachinePasses() {
addPass(createPrologEpilogInserterPass());
/// Add passes that optimize machine instructions after register allocation.
- if (getOptLevel() != CodeGenOpt::None)
- addMachineLateOptimization();
+ if (getOptLevel() != CodeGenOptLevel::None)
+ addMachineLateOptimization();
// Expand pseudo instructions before second scheduling pass.
addPass(&ExpandPostRAPseudosID);
@@ -1196,7 +1210,7 @@ void TargetPassConfig::addMachinePasses() {
// Second pass scheduler.
// Let Target optionally insert this pass by itself at some other
// point.
- if (getOptLevel() != CodeGenOpt::None &&
+ if (getOptLevel() != CodeGenOptLevel::None &&
!TM->targetSchedulesPostRAScheduling()) {
if (MISchedPostRA)
addPass(&PostMachineSchedulerID);
@@ -1205,13 +1219,10 @@ void TargetPassConfig::addMachinePasses() {
}
// GC
- if (addGCPasses()) {
- if (PrintGCInfo)
- addPass(createGCInfoPrinter(dbgs()));
- }
+ addGCPasses();
// Basic block placement.
- if (getOptLevel() != CodeGenOpt::None)
+ if (getOptLevel() != CodeGenOptLevel::None)
addBlockPlacement();
// Insert before XRay Instrumentation.
@@ -1235,7 +1246,8 @@ void TargetPassConfig::addMachinePasses() {
addPass(&LiveDebugValuesID);
addPass(&MachineSanitizerBinaryMetadataID);
- if (TM->Options.EnableMachineOutliner && getOptLevel() != CodeGenOpt::None &&
+ if (TM->Options.EnableMachineOutliner &&
+ getOptLevel() != CodeGenOptLevel::None &&
EnableMachineOutliner != RunOutliner::NeverOutline) {
bool RunOnAllFunctions =
(EnableMachineOutliner == RunOutliner::AlwaysOutline);
@@ -1245,6 +1257,9 @@ void TargetPassConfig::addMachinePasses() {
addPass(createMachineOutlinerPass(RunOnAllFunctions));
}
+ if (GCEmptyBlocks)
+ addPass(llvm::createGCEmptyBasicBlocksPass());
+
if (EnableFSDiscriminator)
addPass(createMIRAddFSDiscriminatorsPass(
sampleprof::FSDiscriminatorPass::PassLast));
@@ -1257,6 +1272,7 @@ void TargetPassConfig::addMachinePasses() {
if (TM->getBBSectionsType() == llvm::BasicBlockSection::List) {
addPass(llvm::createBasicBlockSectionsProfileReaderPass(
TM->getBBSectionsFuncListBuf()));
+ addPass(llvm::createBasicBlockPathCloningPass());
}
addPass(llvm::createBasicBlockSectionsPass());
} else if (TM->Options.EnableMachineFunctionSplitter ||
@@ -1336,7 +1352,8 @@ void TargetPassConfig::addMachineSSAOptimization() {
bool TargetPassConfig::getOptimizeRegAlloc() const {
switch (OptimizeRegAlloc) {
- case cl::BOU_UNSET: return getOptLevel() != CodeGenOpt::None;
+ case cl::BOU_UNSET:
+ return getOptLevel() != CodeGenOptLevel::None;
case cl::BOU_TRUE: return true;
case cl::BOU_FALSE: return false;
}