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authorDimitry Andric <dim@FreeBSD.org>2024-01-09 20:00:28 +0000
committerDimitry Andric <dim@FreeBSD.org>2024-04-06 20:13:28 +0000
commit1db9f3b21e39176dd5b67cf8ac378633b172463e (patch)
tree71bca5bd62db6368f0738c961b2d87e14c8cb602 /contrib/llvm-project/llvm/lib/Target/AMDGPU/DSInstructions.td
parent412fa3436f0d1fe4a7e5e3b66783aa40f599125e (diff)
parentaca2e42c67292825f835f094eb0c4df5ce6013db (diff)
downloadsrc-1db9f3b21e39176dd5b67cf8ac378633b172463e.tar.gz
src-1db9f3b21e39176dd5b67cf8ac378633b172463e.zip
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/AMDGPU/DSInstructions.td')
-rw-r--r--contrib/llvm-project/llvm/lib/Target/AMDGPU/DSInstructions.td1
1 files changed, 0 insertions, 1 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/AMDGPU/DSInstructions.td b/contrib/llvm-project/llvm/lib/Target/AMDGPU/DSInstructions.td
index bc9049b4ef33..3cccd8c50e66 100644
--- a/contrib/llvm-project/llvm/lib/Target/AMDGPU/DSInstructions.td
+++ b/contrib/llvm-project/llvm/lib/Target/AMDGPU/DSInstructions.td
@@ -19,7 +19,6 @@ class DS_Pseudo <string opName, dag outs, dag ins, string asmOps, list<dag> patt
// Most instruction load and store data, so set this as the default.
let mayLoad = 1;
let mayStore = 1;
- let maybeAtomic = 1;
let hasSideEffects = 0;
let SchedRW = [WriteLDS];