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| author | Dimitry Andric <dim@FreeBSD.org> | 2023-04-14 21:41:27 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2023-06-22 18:20:56 +0000 |
| commit | bdd1243df58e60e85101c09001d9812a789b6bc4 (patch) | |
| tree | a1ce621c7301dd47ba2ddc3b8eaa63b441389481 /contrib/llvm-project/llvm/lib/Target/AMDGPU/SIDefines.h | |
| parent | 781624ca2d054430052c828ba8d2c2eaf2d733e7 (diff) | |
| parent | e3b557809604d036af6e00c60f012c2025b59a5e (diff) | |
| download | src-bdd1243df58e60e85101c09001d9812a789b6bc4.tar.gz src-bdd1243df58e60e85101c09001d9812a789b6bc4.zip | |
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/AMDGPU/SIDefines.h')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/AMDGPU/SIDefines.h | 26 |
1 files changed, 15 insertions, 11 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/AMDGPU/SIDefines.h b/contrib/llvm-project/llvm/lib/Target/AMDGPU/SIDefines.h index 85930312352b..97a583421a7e 100644 --- a/contrib/llvm-project/llvm/lib/Target/AMDGPU/SIDefines.h +++ b/contrib/llvm-project/llvm/lib/Target/AMDGPU/SIDefines.h @@ -130,6 +130,9 @@ enum : uint64_t { // Is a WMMA instruction. IsWMMA = UINT64_C(1) << 59, + + // Whether tied sources will be read. + TiedSourceNotRead = UINT64_C(1) << 60, }; // v_cmp_class_* etc. use a 10-bit mask for what operation is checked. @@ -191,6 +194,12 @@ enum OperandType : unsigned { OPERAND_REG_INLINE_AC_V2INT32, OPERAND_REG_INLINE_AC_V2FP32, + // Operand for source modifiers for VOP instructions + OPERAND_INPUT_MODS, + + // Operand for SDWA instructions + OPERAND_SDWA_VOPC_DST, + OPERAND_REG_IMM_FIRST = OPERAND_REG_IMM_INT32, OPERAND_REG_IMM_LAST = OPERAND_REG_IMM_V2FP32, @@ -203,11 +212,8 @@ enum OperandType : unsigned { OPERAND_SRC_FIRST = OPERAND_REG_IMM_INT32, OPERAND_SRC_LAST = OPERAND_REG_INLINE_C_LAST, - // Operand for source modifiers for VOP instructions - OPERAND_INPUT_MODS, - - // Operand for SDWA instructions - OPERAND_SDWA_VOPC_DST + OPERAND_KIMM_FIRST = OPERAND_KIMM32, + OPERAND_KIMM_LAST = OPERAND_KIMM16 }; } @@ -420,9 +426,6 @@ enum Offset : unsigned { // Offset, (5) [10:6] OFFSET_MASK_ = (((1 << OFFSET_WIDTH_) - 1) << OFFSET_SHIFT_), OFFSET_MEM_VIOL = 8, - - OFFSET_SRC_SHARED_BASE = 16, - OFFSET_SRC_PRIVATE_BASE = 0 }; enum WidthMinusOne : unsigned { // WidthMinusOne, (5) [15:11] @@ -430,9 +433,6 @@ enum WidthMinusOne : unsigned { // WidthMinusOne, (5) [15:11] WIDTH_M1_SHIFT_ = 11, WIDTH_M1_WIDTH_ = 5, WIDTH_M1_MASK_ = (((1 << WIDTH_M1_WIDTH_) - 1) << WIDTH_M1_SHIFT_), - - WIDTH_M1_SRC_SHARED_BASE = 15, - WIDTH_M1_SRC_PRIVATE_BASE = 15 }; // Some values from WidthMinusOne mapped into Width domain. @@ -899,6 +899,10 @@ enum Offset_COV5 : unsigned { HOSTCALL_PTR_OFFSET = 80, MULTIGRID_SYNC_ARG_OFFSET = 88, HEAP_PTR_OFFSET = 96, + + DEFAULT_QUEUE_OFFSET = 104, + COMPLETION_ACTION_OFFSET = 112, + PRIVATE_BASE_OFFSET = 192, SHARED_BASE_OFFSET = 196, QUEUE_PTR_OFFSET = 200, |