diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2020-07-31 21:22:58 +0000 | 
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-07-31 21:22:58 +0000 | 
| commit | 5ffd83dbcc34f10e07f6d3e968ae6365869615f4 (patch) | |
| tree | 0e9f5cf729dde39f949698fddef45a34e2bc7f44 /contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | |
| parent | 1799696096df87b52968b8996d00c91e0a5de8d9 (diff) | |
| parent | cfca06d7963fa0909f90483b42a6d7d194d01e08 (diff) | |
Notes
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 25 | 
1 files changed, 16 insertions, 9 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp b/contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp index c4f511abc4ae..9a1855c3458b 100644 --- a/contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp +++ b/contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp @@ -922,18 +922,24 @@ void SIPeepholeSDWA::pseudoOpConvertToVOP2(MachineInstr &MI,      if (I->modifiesRegister(AMDGPU::VCC, TRI))        return;    } +    // Make the two new e32 instruction variants.    // Replace MI with V_{SUB|ADD}_I32_e32 -  auto NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(Opc)); -  NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::vdst)); -  NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src0)); -  NewMI.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src1)); +  BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(Opc)) +    .add(*TII->getNamedOperand(MI, AMDGPU::OpName::vdst)) +    .add(*TII->getNamedOperand(MI, AMDGPU::OpName::src0)) +    .add(*TII->getNamedOperand(MI, AMDGPU::OpName::src1)) +    .setMIFlags(MI.getFlags()); +    MI.eraseFromParent(); +    // Replace MISucc with V_{SUBB|ADDC}_U32_e32 -  auto NewInst = BuildMI(MBB, MISucc, MISucc.getDebugLoc(), TII->get(SuccOpc)); -  NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::vdst)); -  NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src0)); -  NewInst.add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src1)); +  BuildMI(MBB, MISucc, MISucc.getDebugLoc(), TII->get(SuccOpc)) +    .add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::vdst)) +    .add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src0)) +    .add(*TII->getNamedOperand(MISucc, AMDGPU::OpName::src1)) +    .setMIFlags(MISucc.getFlags()); +    MISucc.eraseFromParent();  } @@ -1010,7 +1016,8 @@ bool SIPeepholeSDWA::convertToSDWA(MachineInstr &MI,    // Create SDWA version of instruction MI and initialize its operands    MachineInstrBuilder SDWAInst = -    BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), SDWADesc); +    BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), SDWADesc) +    .setMIFlags(MI.getFlags());    // Copy dst, if it is present in original then should also be present in SDWA    MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);  | 
